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AS3661 bảng dữ liệu(PDF) 17 Page - ams AG |
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AS3661 bảng dữ liệu(HTML) 17 Page - ams AG |
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17 / 87 page ![]() www.austriamicrosystems.com Revision 1.3 16 - 85 AS3661 Datasheet - D e t a i l e d D e s c r i p t i o n 8.5 Modes of Operation The following are the different modes of operation of AS3661 8.5.1 RESET In the RESET mode all the internal registers are reset to the default values. Reset is entered always if Reset Register (3DH) is written FFH or internal Power On Reset is active. Power On Reset (POR) will activate during the chip startup or when the supply voltage VBAT fall below 1.5V (typ.). Once VBAT rises above 1.5V (typ.) POR will be inactivate and the chip will continue to the STANDBY mode. CHIP_EN control bit is low after POR by default. 8.5.2 STANDBY The STANDBY mode is entered if the register bit CHIP_EN or EN pin is logic low and Reset is not active. This is the low power consumption mode, when all circuit functions are disabled. Registers can be written in this mode if EN pin is logic high so that the control bits will be effective right after the start up. 8.5.3 STARTUP When CHIP_EN bit is written high and the EN pin is high, the INTERNAL STARTUP SEQUENCE powers up all the needed internal blocks (VREF, Bias, Oscillator etc.). Startup delay is 500 µs. If the chip temperature rises too high, the Thermal Shutdown (TSD) disables the chip operation and chip waits in STARTUP mode until no thermal shutdown event is present. 8.5.4 NORMAL During NORMAL mode the user controls the chip using the Control Registers. 8.5.5 POWER SAVE In POWER SAVE mode analog blocks are disabled to minimize power consumption. (see Automatic Power Save Mode on page 19) Figure 18. Mode Select <" +!<" !"!& "" (!$ <"<"D00 +<DJ & % '=" % '!" % "!E) DJ 'DJ>!?! JA'DJ>E"? D 'D >!? JA'D >E"? |
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