30F4013 datasheet(108/228 Pages) MICROCHIP

108 / 228 page

dsPIC30F3014/4013

DS70138G-page 108

 2010 Microchip Technology Inc.

16.9

Auto-Baud Support

To allow the system to determine baud rates of

received characters, the input can be optionally linked

to a capture input (IC1 for UART1, IC2 for UART2). To

enable this mode, the user must program the input

capture module to detect the falling and rising edges of

the Start bit.

16.10 UART Operation During CPU

Sleep and Idle Modes

16.10.1

UART OPERATION DURING CPU

SLEEP MODE

When the device enters Sleep mode, all clock sources

to the module are shut down and stay at logic ‘0’. If

entry into Sleep mode occurs while a transmission is in

progress, then the transmission is aborted. The UxTX

pin is driven to logic ‘1’. Similarly, if entry into Sleep

mode occurs while a reception is in progress, then the

reception is aborted. The UxSTA, UxMODE, transmit

and receive registers and buffers, and the UxBRG

If the WAKE bit (UxMODE<7>) is set before the device

enters Sleep mode, a falling edge on the UxRX pin

generates a receive interrupt. The Receive Interrupt

Select mode bit (URXISEL) has no effect for this func-

tion. If the receive interrupt is enabled, this wakes the

device up from Sleep. The UARTEN bit must be set in

order to generate a wake-up interrupt.

16.10.2

UART OPERATION DURING CPU

IDLE MODE

For the UART, the USIDL bit determines if the module

stops or continues operation when the device enters

Idle mode. If USIDL = 0, the module continues

operation during Idle mode. If USIDL = 1, the module

stops on Idle.

30F4013 bảng dữ liệu(PDF) 108 Page - Microchip Technology