FDC37C78-HT datasheet(30/82 Pages) MICROCHIP

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Table 18 - Description of Command Symbols

SYMBOL

NAME

DESCRIPTION

field.

HLT

Head Load Time

The time interval that FDC waits after loading the head and before

initializing a read or write operation. Refer to the Specify command

for actual delays.

HUT

Head Unload Time The time interval from the end of the execution phase (of a read or

write command) until the head is unloaded.

Refer to the Specify

command for actual delays.

LOCK

Lock defines whether EFIFO, FIFOTHR, and PRETRK parameters

of the CONFIGURE COMMAND can be reset to their default values

by a "software Reset". (A reset caused by writing to the appropriate

bits of either tha DSR or DOR)

MFM

MFM/FM Mode

Selector

A one selects the double density (MFM) mode. A zero selects single

density (FM) mode.

Multi-Track

Selector

When set, this flag selects the multi-track operating mode. In this

mode, the FDC treats a complete cylinder under head 0 and 1 as a

single track. The FDC operates as this expanded track started at the

first sector under head 0 and ended at the last sector under head 1.

With this flag set, a multitrack read or write operation will

automatically continue to the first sector under head 1 when the FDC

finishes operating on the last sector under head 0.

Sector Size Code

This specifies the number of bytes in a sector. If this parameter is

“00”, then the sector size is 128 bytes.

The number of bytes

transferred is determined by the DTL parameter.

Otherwise the

sector size is (2 raised to the “N’th” power) times 128. All values up

to “07” hes are allowable. “07”H would equal a sector size of 16k. It

is the user’s resposibility to not select combinations that are not

possible with the drive.

SECTOR SIZE

128 bytes

256 bytes

512 bytes

1024 bytes

...

16 Kbytes

NCN

New Cylinder

Number

The desired cylinder number.

Non-DMA Mode

Flag

When set to 1, indicates that the FDC is to operate in the non-DMA

mode. In this mode, the host is interrupted for each data transfer.

When set to 0, the FDC operates in DMA mode, interfacing to a DMA

controller by means of the DRQ and DACK signals.

Overwrite

The bits D0-D3 of the Perpendicular Mode Command can only be

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