JS28F512P30TFA datasheet(20/86 Pages) MICRON

20 / 86 page

P30-65nm

Datasheet

Sept 2012

Order Number: 208042-0

6.2

Device Command Bus Cycles

Device operations are initiated by writing specific device commands to the CUI. See

Table 7, “Command Bus Cycles” on page 21. Several commands are used to modify

array data including Word Program and Block Erase commands. Writing either

command to the CUI initiates a sequence of internally-timed functions that culminate in

the completion of the requested task. However, the operation can be aborted by either

asserting RST# or by issuing an appropriate suspend command.

Suspend

0xB0

Program or Erase

Suspend

This command issued to any device address initiates a suspend of the

currently-executing program or block erase operation. The Status Register

indicates successful suspend operation by setting either SR.2 (program

suspended) or SR.6 (erase suspended), along with SR.7 (ready). The WSM

remains in the suspend mode regardless of control signal states (except for

RST# asserted).

0xD0

Suspend Resume

This command issued to any device address resumes the suspended program

or block-erase operation.

Protection

0x60

Block lock Setup

First cycle of a 2-cycle command; prepares the CUI for block lock

configuration changes. If the next command is not Block Lock (0x01), Block

Unlock (0xD0), or Block Lock-Down (0x2F), the CUI sets SR[5,4], indicating a

command sequence error.

0x01

Block lock

If the previous command was Block Lock Setup (0x60), the addressed block

is locked.

0xD0

Block Unlock

If the previous command was Block Lock Setup (0x60), the addressed block

is unlocked. If the addressed block is in a lock-down state, the operation has

no effect.

0x2F

Block Lock-Down

If the previous command was Block Lock Setup (0x60), the addressed block

is locked down.

0xC0

OTP Register or

Lock Register

program setup

First cycle of a 2-cycle command; prepares the device for a OTP Register or

Lock Register program operation. The second cycle latches the register

address and data, and starts the programming algorithm to program data the

the OTP array.

Configuration

0x60

Read Configuration

First cycle of a 2-cycle command; prepares the CUI for device read

configuration. If the Set Read Configuration Register command (0x03) is not

the next command, the CUI sets Status Register bits SR[5,4], indicating a

command sequence error.

0x03

Read Configuration

If the previous command was Read Configuration Register Setup (0x60), the

CUI latches the address and writes A[16:1] to the Read Configuration

access array data.

Blank Check

0xBC

Block Blank Check

First cycle of a 2-cycle command; initiates the Blank Check operation on a

array block.

0xD0

Block Blank Check

Confirm

Second cycle of blank check command sequence; it latches the block address

and executes blank check on the array block.

EFI

0xEB

Extended Function

Interface

This command is used in extended function interface. first cycle of a multiple-

cycle command second cycle is a Sub-Op-Code, the data written on third

cycle is one less than the word count; the allowable value on this cycle are 0

through 511. The subsequent cycles load data words into the program buffer

at a specified address until word count is achieved.

Table 6:

Command Codes and Definitions (Sheet 2 of 2)

Mode

Code

Device Mode

Description

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