H3LIS331DL datasheet(32/38 Pages) STMICROELECTRONICS

32 / 38 page

H3LIS331DL

32/38

DocID023111 Rev 2

7.15

INT1_THS (32h)

7.16

INT1_DURATION (33h)

The D6 - D0 bits set the minimum duration of the interrupt 2 event to be recognized.

Duration steps and maximum values depend on the ODR chosen.

7.17

INT2_CFG (34h)

Table 42. INT1_THS register

THS6

THS5

THS4

THS3

THS2

THS1

THS0

Table 43. INT1_THS description

THS6 - THS0

Interrupt 1 threshold. Default value: 000 0000

Table 44. INT1_DURATION register

D6D5D4D3D2D1D0

Table 45. INT2_DURATION description

D6 - D0

Duration value. Default value: 000 0000

Table 46. INT2_CFG register

AOI

ZHIE

ZLIE

YHIE

YLIE

XHIE

XLIE

Table 47. INT2_CFG description

AOI

AND/OR combination of interrupt events. Default value: 0.

(See Table 48)

ZHIE

Enable interrupt generation on Z high event. Default value: 0

(0: disable interrupt request;

1: enable interrupt request on measured accel. value higher than preset threshold)

ZLIE

Enable interrupt generation on Z low event. Default value: 0

(0: disable interrupt request;

1: enable interrupt request on measured accel. value lower than preset threshold)

YHIE

Enable interrupt generation on Y high event. Default value: 0

(0: disable interrupt request;

1: enable interrupt request on measured accel. value higher than preset threshold)

YLIE

Enable interrupt generation on Y low event. Default value: 0

(0: disable interrupt request;

1: enable interrupt request on measured accel. value lower than preset threshold)

H3LIS331DL bảng dữ liệu(PDF) 32 Page - STMicroelectronics

H3LIS331DL bảng dữ liệu(HTML) 32 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

bảng dữ liệu tải về

Link URL