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ST7FLITE25F2M6 bảng dữ liệu(PDF) 78 Page - STMicroelectronics

tên linh kiện ST7FLITE25F2M6
Giải thích chi tiết về linh kiện  8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, Timers, SPI
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ST7FLITE25F2M6 bảng dữ liệu(HTML) 78 Page - STMicroelectronics

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On-chip peripherals
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Doc ID 8349 Rev 5
Figure 39. Input capture timing diagram
11.2.4
Low power modes
11.2.5
Interrupts
COUNTER
t
01h
fCOUNTER
xxh
02h
03h
04h
05h
06h
07h
04h
ATIC PIN
ICF FLAG
ICR REGISTER
INTERRUPT
08h
09h
0Ah
INTERRUPT
ATICR READ
09h
Table 33.
Effect of low power modes
Mode
Description
SLOW
The input frequency is divided by 32
WAIT
No effect on AT timer
ACTIVE-HALT
AT timer halted except if CK0=1, CK1=0 and OVFIE=1
HALT
AT timer halted
Table 34.
Interrupts events
Interrupt event(1)
1.
The CMP and IC events are connected to the same interrupt vector. The OVF event is mapped on a
separate vector (see Interrupts chapter). They generate an interrupt if the enable bit is set in the ATCSR
register and the interrupt mask in the CC register is reset (RIM instruction).
Event
flag
Enable
Control bit
Exit from
WAIT
Exit from
HALT
Exit from
ACTIVE-HALT
Overflow event
OVF
OVIE
Yes
No
Yes(2)
2.
Only if CK0=1 and CK1=0 (fCOUNTER = fLTIMER)
IC event
ICF
ICIE
Yes
No
No
CMP event
CMPF0
CMPIE
Yes
No
No



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