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SPC5604BF2MLL6 bảng dữ liệu(PDF) 1 Page - Freescale Semiconductor, Inc |
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SPC5604BF2MLL6 bảng dữ liệu(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 109 page  Freescale Semiconductor Data Sheet: Advance Information Document Number: MPC5604BC Rev. 11, 12/2012 © Freescale Semiconductor, Inc., 2009-2012. All rights reserved. This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. MPC5604B/C TBD MAPBGA–225 15 mm x 15 mm QFN12 ##_mm_x_##mm SOT-343R ##_mm_x_##mm PKG-TBD ## mm x ## mm 208 MAPBGA (17 x 17 x 1.7 mm) 144 LQFP (20 x 20 x 1.4 mm) 100 LQFP (14 x 14 x 1.4 mm) 64 LQFP (10 x 10 x 1.4 mm) Features • Single issue, 32-bit CPU core complex (e200z0) — Compliant with the Power Architecture® embedded category — Includes an instruction set enhancement allowing variable length encoding (VLE) for code size footprint reduction. With the optional encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve significant code size footprint reduction. • Up to 512 KB on-chip code flash supported with the flash controller and ECC • 64 (4 × 16) KB on-chip data flash memory with ECC • Up to 48 KB on-chip SRAM with ECC • Memory protection unit (MPU) with 8 region descriptors and 32-byte region granularity • Interrupt controller (INTC) with 148 interrupt vectors, including 16 external interrupt sources and 18 external interrupt/wakeup sources • Frequency modulated phase-locked loop (FMPLL) • Crossbar switch architecture for concurrent access to peripherals, flash memory, or RAM from multiple bus masters • Boot assist module (BAM) supports internal flash programming via a serial link (CAN or SCI) • Timer supports input/output channels providing a range of 16-bit input capture, output compare, and pulse width modulation functions (eMIOS-lite) • 10-bit analog-to-digital converter (ADC) • 3 serial peripheral interface (DSPI) modules • Up to 4 serial communication interface (LINFlex) modules • Up to 6 enhanced full CAN (FlexCAN) modules with configurable buffers • 1 inter IC communication interface (I2C) module • Up to 123 configurable general purpose pins supporting input and output operations (package dependent) • Real Time Counter (RTC) with clock source from 128 kHz or 16 MHz internal RC oscillator supporting autonomous wakeup with 1 ms resolution with max timeout of 2 seconds • Up to 6 periodic interrupt timers (PIT) with 32-bit counter resolution • 1 System Module Timer (STM) • Nexus development interface (NDI) per IEEE-ISTO 5001-2003 Class Two Plus standard • Device/board boundary Scan testing supported with per Joint Test Action Group (JTAG) of IEEE (IEEE 1149.1) • On-chip voltage regulator (VREG) for regulation of input supply for all internal levels MPC5604B/C Microcontroller Data Sheet 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . 9 3.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 Pad configuration during reset phases . . . . . . . . . . . . . 13 3.3 Voltage supply pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4 Pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Functional ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.7 Nexus 2+ pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 31 3.9 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.10 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . 32 3.11 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.12 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . 34 3.13 Recommended operating conditions . . . . . . . . . . . . . . 35 3.14 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 37 3.15 I/O pad electrical characteristics. . . . . . . . . . . . . . . . . . 38 3.16 RESET electrical characteristics . . . . . . . . . . . . . . . . . 48 3.17 Power management electrical characteristics . . . . . . . 50 3.18 Power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 3.19 Flash memory electrical characteristics . . . . . . . . . . . . 58 3.20 Electromagnetic compatibility (EMC) characteristics . . 60 3.21 Fast external crystal oscillator (4 to 16 MHz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 3.22 Slow external crystal oscillator (32 kHz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.23 FMPLL electrical characteristics. . . . . . . . . . . . . . . . . . 67 3.24 Fast internal RC oscillator (16 MHz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 3.25 Slow internal RC oscillator (128 kHz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 3.26 ADC electrical characteristics. . . . . . . . . . . . . . . . . . . . 71 3.27 On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 4 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 4.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . 88 5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 6 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Appendix AAbbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 |
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