SPC5604BF2MLL6 datasheet(38/109 Pages) FREESCALE

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MPC5604B/C Microcontroller Data Sheet, Rev. 11

Package pinouts and signal descriptions

Freescale Semiconductor

3.14.2

Power considerations

The average chip-junction temperature, TJ, in degrees Celsius, may be calculated using Equation 1:

TJ = TA + (PD x RJA)

Eqn. 1

Where:

TA is the ambient temperature in °C.

RJA is the package junction-to-ambient thermal resistance, in °C/W.

PD is the sum of PINT and PI/O (PD = PINT + PI/O).

PINT is the product of IDD and VDD, expressed in watts. This is the chip internal power.

PI/O represents the power dissipation on input and output pins; user determined.

Most of the time for the applications, PI/O< PINT and may be neglected. On the other hand, PI/O may be significant, if the device

is configured to continuously drive external modules and/or memories.

An approximate relationship between PD and TJ (if PI/O is neglected) is given by:

PD = K / (TJ + 273 °C)

Eqn. 2

Therefore, solving equations 1 and 2:

K = PD x (TA + 273 °C) + RJA x PD2

Eqn. 3

Where:

K is a constant for the particular part, which may be determined from Equation 3 by measuring PD (at equilibrium)

for a known TA. Using this value of K, the values of PD and TJ may be obtained by solving equations 1 and 2

iteratively for any value of TA.

3.15

I/O pad electrical characteristics

3.15.1

I/O pad types

The device provides four main I/O pad types depending on the associated alternate functions:

•

Slow pads—These pads are the most common pads, providing a good compromise between transition time and low

electromagnetic emission.

•

Medium pads—These pads provide transition fast enough for the serial communication channels with controlled

current to reduce electromagnetic emission.

•

Fast pads—These pads provide maximum speed. There are used for improved Nexus debugging capability.

•

Input only pads—These pads are associated to ADC channels and the external 32 kHz crystal oscillator (SXOSC)

providing low input leakage.

Medium and Fast pads can use slow configuration to reduce electromagnetic emission, at the cost of reducing AC performance.

2 VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C

3 Junction-to-ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test

board meets JEDEC specification for this package.

4 Junction-to-board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC

specification for the specified package.

5 Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate

temperature is used for the case temperature. Reported value includes the thermal resistance of the interface

layer.

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