DSPIC33FJ64GS406 datasheet(220/456 Pages) MICROCHIP

220 / 456 page

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

DS70591E-page 220

 2009-2012 Microchip Technology Inc.

TxCON: TIMERx CONTROL REGISTER (x = 2, 4)

R/W-0

U-0

R/W-0

U-0

TON

—TSIDL

—

bit 15

bit 8

U-0

R/W-0

U-0

R/W-0

U-0

—

TGATE

TCKPS<1:0>

T32

—TCS

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

TON: Timerx On bit

When T32 = 1 (in 32-Bit Timer mode):

1 = Starts 32-bit TMRx:TMRy timer pair

0 = Stops 32-bit TMRx:TMRy timer pair

When T32 = 0 (in 16-Bit Timer mode):

1 = Starts 16-bit timer

0 = Stops 16-bit timer

bit 14

Unimplemented: Read as ‘0’

bit 13

TSIDL: Timerx Stop in Idle Mode bit

1 = Discontinues timer operation when device enters Idle mode

0 = Continues timer operation in Idle mode

bit 12-7

Unimplemented: Read as ‘0’

bit 6

TGATE: Timerx Gated Time Accumulation Enable bit

When TCS = 1:

This bit is ignored.

When TCS = 0:

1 = Gated time accumulation is enabled

0 = Gated time accumulation is disabled

bit 5-4

TCKPS<1:0>: Timerx Input Clock Prescale Select bits

11 = 1:256 prescale value

10 = 1:64 prescale value

01 = 1:8 prescale value

00 = 1:1 prescale value

bit 3

T32: 32-Bit Timerx Mode Select bit

1 = TMRx and TMRy form a 32-bit timer

0 = TMRx and TMRy form a separate 16-bit timer

bit 2

Unimplemented: Read as ‘0’

bit 1

TCS: Timerx Clock Source Select bit

1 = External clock from TxCK pin

0 = Internal clock (FOSC/2)

bit 0

Unimplemented: Read as ‘0’

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