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dsPIC33FJ64GS406 bảng dữ liệu(PDF) 218 Page - Microchip Technology |
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dsPIC33FJ64GS406 bảng dữ liệu(HTML) 218 Page - Microchip Technology |
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218 / 456 page ![]() dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 DS70591E-page 218 2009-2012 Microchip Technology Inc. The Timer2/3/4/5 modules can operate in one of the following modes: • Timer mode • Gated Timer mode • Synchronous Counter mode In Timer and Gated Timer modes, the input clock is derived from the internal instruction cycle clock (FCY). In Synchronous Counter mode, the input clock is derived from the external clock input at the TxCK pin. The timer modes are determined by the following bits: • TCS (TxCON<1>): Timer Clock Source Control bit • TGATE (TxCON<6>): Timer Gate Control bit Timer control bit settings for different operating modes are given in the Table 13-1. TABLE 13-1: TIMER MODE SETTINGS 13.1 16-Bit Operation To configure any of the timers for individual 16-bit operation: 1. Clear the T32 bit corresponding to that timer. 2. Select the timer prescaler ratio using the TCKPS<1:0> bits. 3. Set the Clock and Gating modes using the TCS and TGATE bits. 4. Load the timer period value into the PRx register. 5. If interrupts are required, set the interrupt enable bit, TxIE. Use the priority bits, TxIP<2:0>, to set the interrupt priority. 6. Set the TON bit. 13.2 32-Bit Operation A 32-bit timer module can be formed by combining a Type B and a Type C 16-bit timer module. For 32-bit timer operation, the T32 control bit in the Type B Timer Control (TxCON<3>) register must be set. The Type C timer holds the most significant word (msw) and the Type B timer holds the least significant word (lsw) for 32-bit operation. When configured for 32-bit operation, only the Type B Timerx Control (TxCON) register bits are required for setup and control while the Type C Timer Control register bits are ignored (except the TSIDL bit). For interrupt control, the combined 32-bit timer uses the interrupt enable, interrupt flag and interrupt priority control bits of the Type C timer. The interrupt control and status bits for the Type B timer are ignored during 32-bit timer operation. The timers that can be combined to form a 32-bit timer are listed in Table 13-2. TABLE 13-2: 32-BIT TIMER A block diagram representation of the 32-bit timer module is shown in Figure 13-3. The 32-timer module can operate in one of the following modes: • Timer mode • Gated Timer mode • Synchronous Counter mode To configure the timer features for 32-bit operation: 1. Set the T32 control bit. 2. Select the prescaler ratio for Timer2 using the TCKPS<1:0> bits. 3. Set the Clock and Gating modes using the corresponding TCS and TGATE bits. 4. Load the timer period value. PR3 contains the most significant word of the value, while PR2 contains the least significant word. 5. If interrupts are required, set the interrupt enable bit, T3IE. Use the priority bits, T3IP<2:0>, to set the interrupt priority. While Timer2 controls the timer, the interrupt appears as a Timer3 interrupt. 6. Set the corresponding TON bit. Mode TCS TGATE Timer 00 Gated Timer 01 Synchronous Counter 1x Type B Timer (lsw) Type C Timer (msw) Timer2 Timer3 TImer4 Timer5 |
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