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SE33 bảng dữ liệu(PDF) 96 Page - Microchip Technology |
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SE33 bảng dữ liệu(HTML) 96 Page - Microchip Technology |
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96 / 478 page ![]() PIC16(L)F1946/47 DS41414D-page 96 2010-2012 Microchip Technology Inc. REGISTER 7-5: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4 U-0 U-0 R/W-0/0 R/W-0/0 U-0 U-0 R/W-0/0 R/W-0/0 — — RC2IE TX2IE — — BCL2IE SSP2IE bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-6 Unimplemented: Read as ‘0’ bit 5 RC2IE: USART2 Receive Interrupt Enable bit 1 = Enables the USART2 receive interrupt 0 = Disables the USART2 receive interrupt bit 4 TX2IE: USART2 Transmit Interrupt Enable bit 1 = Enables the USART2 transmit interrupt 0 = Disables the USART2 transmit interrupt bit 3-2 Unimplemented: Read as ‘0’ bit 1 BCL2IE: MSSP2 Bus Collision Interrupt Enable bit 1 = Enables the MSSP2 Bus Collision Interrupt 0 = Disables the MSSP2 Bus Collision Interrupt bit 0 SSP2IE: Synchronous Serial Port (MSSP2) Interrupt Enable bit 1 = Enables the MSSP2 interrupt 0 = Disables the MSSP2 interrupt Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt. |
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