SE33 datasheet(47/478 Pages) MICROCHIP

47 / 478 page

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DS41414D-page 47

PIC16(L)F1946/1947

Bank 31

F80h(2)

INDF0

Addressing this location uses contents of FSR0H/FSR0L to address data memory

(not a physical register)

xxxx xxxx xxxx xxxx

F81h(2)

INDF1

Addressing this location uses contents of FSR1H/FSR1L to address data memory

(not a physical register)

xxxx xxxx xxxx xxxx

F82h(2)

PCL

Program Counter (PC) Least Significant Byte

0000 0000 0000 0000

F83h(2)

STATUS

—

—TO

ZDC

---1 1000 ---q quuu

F84h(2)

FSR0L

Indirect Data Memory Address 0 Low Pointer

0000 0000 uuuu uuuu

F85h(2)

FSR0H

Indirect Data Memory Address 0 High Pointer

0000 0000 0000 0000

F86h(2)

FSR1L

Indirect Data Memory Address 1 Low Pointer

0000 0000 uuuu uuuu

F87h(2)

FSR1H

Indirect Data Memory Address 1 High Pointer

0000 0000 0000 0000

F88h(2)

BSR

—

BSR<4:0>

---0 0000 ---0 0000

F89h(2)

WREG

Working Register

0000 0000 uuuu uuuu

F8Ah(1),(2

)

PCLATH

—

Write Buffer for the upper 7 bits of the Program Counter

-000 0000 -000 0000

F8Bh(2)

INTCON

GIE

PEIE

TMR0IE

INTE

IOCIE

TMR0IF

INTF

IOCIF

0000 000x 0000 000u

F8Ch

—

FE3h

—

Unimplemented

—

FE4h

STATUS_

SHAD

ZDC

---- -xxx ---- -uuu

FE5h

WREG_

SHAD

Working Register Normal (Non-ICD) Shadow

xxxx xxxx uuuu uuuu

FE6h

BSR_

SHAD

Bank Select Register Normal (Non-ICD) Shadow

---x xxxx ---u uuuu

FE7h

PCLATH_

SHAD

Program Counter Latch High Register Normal (Non-ICD) Shadow

-xxx xxxx uuuu uuuu

FE8h

FSR0L_

SHAD

Indirect Data Memory Address 0 Low Pointer Normal (Non-ICD) Shadow

xxxx xxxx uuuu uuuu

FE9h

FSR0H_

SHAD

Indirect Data Memory Address 0 High Pointer Normal (Non-ICD) Shadow

xxxx xxxx uuuu uuuu

FEAh

FSR1L_

SHAD

Indirect Data Memory Address 1 Low Pointer Normal (Non-ICD) Shadow

xxxx xxxx uuuu uuuu

FEBh

FSR1H_

SHAD

Indirect Data Memory Address 1 High Pointer Normal (Non-ICD) Shadow

xxxx xxxx uuuu uuuu

FECh

—

Unimplemented

—

FEDh

STKPTR

—

Current Stack Pointer

---1 1111 ---1 1111

FEEh

TOSL

Top of Stack Low byte

xxxx xxxx uuuu uuuu

FEFh

TOSH

—

Top of Stack High byte

-xxx xxxx -uuu uuuu

TABLE 3-10:

SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Value on all

other

Resets

Legend:

x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.

Shaded locations are unimplemented, read as ‘0’.

Note

The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are

transferred to the upper byte of the program counter.

These registers can be addressed from any bank.

Unimplemented, read as ‘1’.

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