PIC16F690IP datasheet(43/306 Pages) MICROCHIP

43 / 306 page

DS41262E-page 41

PIC16F631/677/685/687/689/690

2.2.2.6

PIR1 Register

The PIR1 register contains the interrupt flag bits, as

shown in Register 2-6.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the global

enable bit, GIE of the INTCON register.

User

software

should

ensure

the

appropriate interrupt flag bits are clear

prior to enabling an interrupt.

PIR1: PERIPHERAL INTERRUPT REQUEST REGISTER 1

U-0

R/W-0

R-0

R/W-0

—

ADIF(5)

RCIF(3)

TXIF(3)

SSPIF(4)

CCP1IF(2)

TMR2IF(1)

TMR1IF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Read as ‘0’

bit 6

ADIF: A/D Converter Interrupt Flag bit(5)

= A/D conversion complete (must be cleared in software)

= A/D conversion has not completed or has not been started

bit 5

RCIF: EUSART Receive Interrupt Flag bit(3)

= The EUSART receive buffer is full (cleared by reading RCREG)

= The EUSART receive buffer is not full

bit 4

TXIF: EUSART Transmit Interrupt Flag bit(3)

= The EUSART transmit buffer is empty (cleared by writing to TXREG)

= The EUSART transmit buffer is full

bit 3

SSPIF: Synchronous Serial Port (SSP) Interrupt Flag bit(4)

= The Transmission/Reception is complete (must be cleared in software)

= Waiting to Transmit/Receive

bit 2

CCP1IF: CCP1 Interrupt Flag bit(2)

Capture mode:

= A TMR1 register capture occurred (must be cleared in software)

= No TMR1 register capture occurred

Compare mode:

= A TMR1 register compare match occurred (must be cleared in software)

= No TMR1 register compare match occurred

PWM mode:

Unused in this mode

bit 1

TMR2IF: Timer2 to PR2 Interrupt Flag bit(1)

= A Timer2 to PR2 match occurred (must be cleared in software)

= No Timer2 to PR2 match occurred

bit 0

TMR1IF: Timer1 Overflow Interrupt Flag bit

= The TMR1 register overflowed (must be cleared in software)

= The TMR1 register did not overflow

Note 1:

PIC16F685/PIC16F690 only.

PIC16F685/PIC16F689/PIC16F690 only.

PIC16F687/PIC16F689/PIC16F690 only.

PIC16F677/PIC16F687/PIC16F689/PIC16F690 only.

PIC16F677/PIC16F685/PIC16F687/PIC16F689/PIC16F690 only.

PIC16F690IP bảng dữ liệu(PDF) 43 Page - Microchip Technology

PIC16F690IP bảng dữ liệu(HTML) 43 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL