ADMC401BST datasheet(11/60 Pages) AD

11 / 60 page

ADMC401

–11–

REV. B

POWER DISSIPATION

To determine total power dissipation in a specific application,

the following equation should be applied for each output:

× V

× f

C = load capacitance, f = output switching frequency.

Example:

In an application where external data memory is used and no

other outputs are active, power dissipation is calculated as

follows:

Assumptions:

• External data memory is accessed every cycle with 50% of the

address pins switching.

• External data memory writes occur every other cycle with

50% of the data pins switching.

• Each address and data pin has a 10 pF total load at the pin.

• The application operates at VDD = 5.0 V and tCK = 38.5 ns.

Total Power Dissipation = PINT + (C

× V

× f)

PINT = VDD

× (I

DD Digital + IDD Analog)

× V

× f) is calculated for each output:

# of

Pins

VDD

Address,

DMS

× 10 pF × 52 V

× 26 MHz

= 52.00 mW

Data Output,

WR 9

× 10 pF × 52 V

× 13 MHz

= 29.25 mW

× 10 pF × 52 V

× 13 MHz

3.25 mW

CLKOUT

× 10 pF × 52 V

× 26 MHz

6.50 mW

91.00 mW

Total power dissipation for this example is PINT + 91 mW.

TEST CONDITIONS

Output Disable Time

Output pins are considered to be disabled when they have

stopped driving and started a transition from the measured

output high or low voltage to a high impedance state. The out-

put disable time (tDIS) is the difference of tMEASURED and tDECAY,

as shown in the Output Enable/Disable diagram. The time is the

interval from when a reference signal reaches a high or low

voltage level to when the output voltages have changed by 0.5 V

from the measured output high or low voltage. The decay time,

tDECAY, is dependent on the capacitative load, CL, and the cur-

rent load, iL, on the output pin. It can be approximated by the

following equation:

DECAY

× 05

from which

DIS

MEASURED

DECAY

=−

is calculated. If multiple pins (such as the data bus) are dis-

abled, the measurement value is that of the last pin to stop

driving.

3.0V

1.5V

0.0V

2.0V

1.5V

0.3V

INPUT

OUTPUT

Figure 7. Voltage Reference Levels for AC Measure-

ments (Except Output Enable/Disable)

Output Enable Time

Output pins are considered to be enabled when that have made

a transition from a high-impedance state to when they start

driving. The output enable time (tENA) is the interval from when

a reference signal reaches a high or low voltage level to when

the output has reached a specified high or low trip point, as

shown in the Output Enable/Disable diagram. If multiple pins

(such as the data bus) are enabled, the measurement value is

that of the first pin to start driving.

2.0V

1.0V

tENA

REFERENCE

SIGNAL

OUTPUT

tDECAY

VOH

(MEASURED)

OUTPUT STOPS

DRIVING

OUTPUT STARTS

DRIVING

tDIS

tMEASURED

VOL

(MEASURED)

VOH (MEASURED) – 0.5V

VOL (MEASURED) +0.5V

HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE

THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.

VOH

(MEASURED)

VOL

(MEASURED)

Figure 8. Output Enable/Disable

OUTPUT

50pF

+1.5V

IOH

IOL

Figure 9. Equivalent Device Loading for AC Measure-

ments (Including All Fixtures)

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