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WM8983GEFL/V bảng dữ liệu(PDF) 79 Page - Wolfson Microelectronics plc |
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WM8983GEFL/V bảng dữ liệu(HTML) 79 Page - Wolfson Microelectronics plc |
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79 / 124 page ![]() Production Data WM8983 w PD, Rev 4.3, May 2010 79 UNUSED ANALOGUE INPUTS/OUTPUTS Whenever an analogue input/output is disabled, it remains connected to a voltage source (either AVDD1/2 or 1.5xAVDD1/2 as appropriate) through a resistor. This helps to prevent pop noise when the output is re-enabled. The resistance between the voltage buffer and the output pins can be controlled using the VROI control bit. The default impedance is low, so that any capacitors on the outputs can charge up quickly at start-up. If a high impedance is desired for disabled outputs, VROI can then be set to 1, increasing the resistance to about 30k Ω. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R49 0 VROI 0 VREF (AVDD1/2 or 1.5xAVDD/2) to analogue output resistance 0: approx 1k Ω 1: approx 30 k Ω Table 53 Disabled Outputs to VREF Resistance A dedicated buffer is available for biasing unused analogue I/O pins as shown in Figure 41. This buffer can be enabled using the BUFIOEN register bit. If the SPKBOOST, OUT3BOOST or OUT4BOOST bits are set then the relevant outputs will be tied to the output of the DC level shift buffer at 1.5xAVDD/2 when disabled. Figure 41 summarises the bias options for the output pins. Figure 41 Unused Input/Output Pin Tie-off Buffers |
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