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WM8980CGEFL/V bảng dữ liệu(PDF) 92 Page - Wolfson Microelectronics plc

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WM8980CGEFL/V bảng dữ liệu(HTML) 92 Page - Wolfson Microelectronics plc

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WM8980
Pre-Production
w
PP, Rev 3.8, May 2012
92
POWER MANAGEMENT
SAVING POWER BY REDUCING OVERSAMPLING RATE
The default mode of operation of the ADC and DAC digital filters is in 64x oversampling mode. Under
the control of ADCOSR and DACOSR the oversampling rate may be doubled. 64x oversampling
results in a slight decrease in noise performance compared to 128x but lowers the power
consumption of the device.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R10
DAC control
3
DACOSR128
0
DAC oversample rate select
0 = 64x (lowest power)
1 = 128x (best SNR)
R14
ADC control
3
ADCOSR128
0
ADC oversample rate select
0 = 64x (lowest power)
1 = 128x (best SNR)
Table 68 ADC and DAC Oversampling Rate Selection
VMID
The analogue circuitry will not work when VMID is disabled (VMIDSEL[1:0] = 00b). The impedance of
the VMID resistor string, together with the decoupling capacitor on the VMID pin will determine the
startup time of the VMID circuit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1
Power
management 1
1:0
VMIDSEL
00
Reference string impedance to VMID pin
(determines startup time):
00=off (open circuit)
01=75kΩ
10=300kΩ
11=5kΩ (for fastest startup)
Table 69 VMID Impedance Control
BIASEN
The analogue amplifiers will not operate unless BIASEN is enabled.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1
Power
management 1
3
BIASEN
0
Analogue amplifier bias control
0=disabled
1=enabled
Table 70 Analogue Bias Control



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