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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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SN8P1602AS bảng dữ liệu(PDF) 65 Page - SONiX Technology Company |
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SN8P1602AS bảng dữ liệu(HTML) 65 Page - SONiX Technology Company |
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65 / 94 page  SN8P1600 8-bit micro-controller SONiX TECHNOLOGY CO., LTD Page 65 Revision 1.94 9 9 9 INTERRUPT OVERVIEW The SN8P1600 provides 2 interrupt sources, including one internal interrupts (TC0/TC1) and one external interrupts (INT0). The external interrupt can Wakeup the chip while the system is switched from power down mode to high-speed normal mode. Once interrupt service is executed, the GIE bit in STKP register will clear to “0” for stopping other interrupt request. On the contrast, when interrupt service exits, the GIE bit will set to “1” to accept the next interrupts’ request. All of the interrupt request signals are stored in INTRQ register. The user can program the chip to check INTRQ’s content for setting executive priority. SN8P1602/1603 SN8P1604 Note: The GIE bit must enable and all interrupt operations work. INTRQ 2-bit Latchs TC0IRQ Interrupt enable gating Global interrupt request signal Interrupt vector address (0008H) TC0 time out INTEN Interrupt enable register The interrupt trigger edge : INT0 = falling edge P00IRQ INT0 trigger INTRQ 2-bit Latchs TC0IRQ Interrupt enable gating Global interrupt request signal Interrupt vector address (0008H) TC0 time out INTEN Interrupt enable register The interrupt trigger edge : INT0 = falling edge P00IRQ INT0 trigger Interrupt vector address (0008H) INTRQ 2-bit Latches TC1IRQ Interrupt enable gating Global interrupt request signal TC1 time out INTEN Interrupt enable register The interrupt trigger edge : INT0 = falling edge P00IRQ INT0 trigger Interrupt vector address (0008H) INTRQ 2-bit Latches TC1IRQ Interrupt enable gating Global interrupt request signal TC1 time out INTEN Interrupt enable register The interrupt trigger edge : INT0 = falling edge P00IRQ INT0 trigger INTRQ 2-bit Latches TC1IRQ Interrupt enable gating Global interrupt request signal TC1 time out INTEN Interrupt enable register The interrupt trigger edge : INT0 = falling edge P00IRQ INT0 trigger |
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