33663 datasheet(16/37 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

33663

ELECTRICAL CHARACTERISTICS

TIMING DIAGRAMS

Figure 8. Test Circuit for Timing Measurements

TXD TIMING

TXD Permanent Dominant State Delay(28)

tTXDDOM

3.75

5.0

6.25

FIRST DOMINANT BIT VALIDATION

First dominant bit validation delay when device in Normal Mode(29)

tFIRST_DOM

—

FAST BAUD RATE TIMING

EN Low Pulse Duration to Enter in Fast Baud Rate Using Toggle Function (30)

EN High to Low and Low to High

—

s

TXD Low Pulse Duration to Enter in Fast Baud Rate Using Toggle Function (30)

12.5

—

µs

Delay Between EN Falling Edge and TXD Falling Edge to Enter in Fast Baud

Rate Using Toggle Function (30)

12.5

—

µs

Delay Between TXD Rising Edge and EN Rising Edge to Enter in Fast Baud

Rate Using Toggle Function (30)

12.5

—

µs

RXD Low Level duration after EN rising edge to validate the Fast Baud Rate

entrance(30)

1.875

6.25

µs

Notes

28.

The LIN is in recessive state and the receiver is still active

29.

See Figures 14, 15, 16, and 21

30.

See Figures 19 and 20

Table 6. Dynamic Electrical Characteristics

Characteristics noted under conditions 7.0 V

 VSUP  18 V, -40 C  TA  125 C, GND = 0 V, unless otherwise noted.

Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

LIN

GND

VSUP

Note R0 and C0: 1.0 k/1.0 nF, 660 /6.8 nF, and 500 /10 nF.

TXD

RXD

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