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33663 bảng dữ liệu(PDF) 14 Page - Freescale Semiconductor, Inc

tên linh kiện 33663
Giải thích chi tiết về linh kiện  LIN 2.1 / SAEJ2602-2 Dual LIN Physical Layer
PDF  37 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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33663 bảng dữ liệu(HTML) 14 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
14
Freescale Semiconductor
33663
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTIC
DYNAMIC ELECTRICAL CHARACTERISTIC
Table 6. Dynamic Electrical Characteristics
Characteristics noted under conditions 7.0 V
 VSUP  18 V, -40 C  TA  125 C, GND = 0 V, unless otherwise noted.
Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
LIN1, LIN2 PHYSICAL LAYER
DRIVERS CHARACTERISTICS FOR NORMAL SLEW RATE - 20.0 KBIT/SEC ACCORDING TO LIN PHYSICAL LAYER
SPECIFICATION(16)(17)
33663L AND 33663S DEVICE
Duty Cycle 1:
THREC(MAX) = 0.744 * VSUP; THDOM(MAX) = 0.581 * VSUP
D1 = tBUS_REC(MIN)/(2 x tBIT), tBIT = 50 µs, 7.0 V VSUP18 V
D1
0.396
–
–
Duty Cycle 2:
THREC(MIN) = 0.422 * VSUP; THDOM(MIN) = 0.284 * VSUP
D2 = tBUS_REC(MAX)/(2 x tBIT), tBIT = 50 µs, 7.6 V VSUP18 V
D2
–
–
0.581
LIN1, LIN2 PHYSICAL LAYER
DRIVERS CHARACTERISTICS FOR SLOW SLEW RATE - 10.4 KBIT/SEC ACCORDING TO LIN PHYSICAL LAYER
SPECIFICATION(16)(18)
33663J DEVICE
Duty Cycle 3:
THREC(MAX) = 0.778 * VSUP; THDOM(MAX) = 0.616 * VSUP
D3 = tBUS_REC(MIN)/(2 x tBIT), tBIT = 96 µs, 7.0 V VSUP18 V
D3
0.417
–
–
Duty Cycle 4:
THREC(MIN) = 0.389 * VSUP; THDOM(MIN) = 0.251 * VSUP
D4 = tBUS_REC(MAX)/(2 x tBIT), tBIT = 96 µs, 7.6 V VSUP18 V
D4
–
–
0.590
LIN1, LIN2 PHYSICAL LAYER - DRIVERS CHARACTERISTICS FOR FAST SLEW RATE
Fast Bit Rate (Programming Mode)
BRFAST
–
–
100
kBit/s
LIN1, LIN2 PHYSICAL LAYER - TRANSMITTER CHARACTERISTICS FOR NORMAL SLEW RATE - 20.0 KBIT/SEC(19)
33663S DEVICE
Symmetry of Transmitter delay(20)
tTRAN_SYM = MAX (tTRAN_SYM60%, tTRAN_SYM40%)
tTRAN_SYM60% = | tTRAN_PDF60% - tTRAN_PDR60% |
tTRAN_SYM40% = | tTRAN_PDF40% - tTRAN_PDR40% |
tTRAN_SYM
-7.25
–
7.25
s
Notes
16.
Bus load RBUS and CBUS 1.0 nF / 1.0 k, 6.8 nF / 660, 10 nF / 500 . Measurement thresholds: 50% of TXD signal to LIN signal
threshold defined at each parameter. See Figure 8.
17.
See Figure 9
18.
See Figure 10
19.
VSUP from 7.0 to 18 V, bus load RBUS and CBUS 1.0 nF / 1.0 k, 6.8 nF / 660 , 10 nF / 500 . Measurement thresholds: 50% of TXD
signal to LIN signal threshold defined at each parameter. See Figure 8.
20.
See Figure 11



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