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33663 bảng dữ liệu(PDF) 26 Page - Freescale Semiconductor, Inc

tên linh kiện 33663
Giải thích chi tiết về linh kiện  LIN 2.1 / SAEJ2602-2 Dual LIN Physical Layer
PDF  37 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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33663 bảng dữ liệu(HTML) 26 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
26
Freescale Semiconductor
33663
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
As soon as the device enters Normal mode, the LIN transmitter will be able to send the first dominant bit only after the
tFIRST_DOM delay. tFIRST_DOM delay has no impact on the receiver. The receiver will be enabled as soon as the device enters
Normal mode.
Receiver Characteristics
The receiver thresholds are ratiometric with the device supply pin.
If the VSUP voltage goes below the VSUP under-voltage threshold (VUVL, VUVH), the bus LIN1 and bus LIN2 enter into a recessive
state even if communication is sent to TXD1 or TXD2.
For the LIN Module 1, in case of LIN1 Thermal Shutdown, the transceiver and receiver are in recessive and INH1 turned off.
When the temperature is below the TLINSD, INH1 and LIN1 will be automatically enabled. The same behavior is valid for LIN
Module 2.
For each LIN Module, the Fast Baud Rate selection is reported by the RXD pin. Fast Baud Rate is activated by the toggle
function (See Figure 19). At the end of the toggle function, just after EN rising edge, RXD pin is kept low for t5 to flag the Fast
Baud Rate entry (See Figure 19).
To exit the Fast Baud Rate and return in Normal or Slow baud rate, a toggle function is needed. At the end the toggle function,
RXD pin stays high to signal Fast Baud Rate exit (See Figure 20). The device enters into Fast Baud Rate at room and hot
temperature.
DATA INPUT PINS (TXD1, TXD2)
The TXD1 and TXD2 inputs pins are the MCU interface to control the state of the LIN1 and LIN2 outputs. When TXD1 (TXD2)
is LOW (dominant), LIN1 (LIN2) output is LOW; when TXD1 (TXD2) is HIGH (recessive), the LIN1 (LIN2) output transistor is
turned OFF. TXD1/TXD2 pins thresholds are 3.3 V and 5.0 V compatible.
These pins have an internal pull-up current source to force the recessive state if the input pins are left floating.
If TXD1 (TXD2) stays low (dominant sate) more than 5.0 ms (typical value), the LIN1 (LIN2) transmitter of LIN Module goes
automatically into recessive state.
DATA OUTPUT PINS (RXD1, RXD2)
Each LIN Modules integrate the same RXD output structure and functionality. Both pins are independent. The following
description is the same for both.
RXD output pin is the MCU interface, which reports the state of the LIN bus voltage.
In Normal or Slow baud rate, LIN HIGH (recessive) is reported by a high voltage on RXD; LIN LOW (dominant) is reported by
a low voltage on RXD. The RXD output structure is a tristate output buffer.
Figure 24. RXD interface
The RXD output pins are the receiver output of the LIN interface. The low level is fixed. The high level is dependent on EN
voltage. If EN is set at 3.3 V, RXD VOH is 3.3 V. If EN is set at 5.0 V, RXD VOH is 5.0 V. The RXD1 and RXD2 VOH level can be
defined independently.
In sleep mode, RXD are high-impedance. When a wake-up event is recognized from the WAKE pin or from the LIN bus pin,
RXD is pulled LOW to report the wake-up event. An external pull-up resistor may be needed.
RXD
EN
200k
X1
EN_RXD
LIN
VSUP
Slope
Control
Receiver
30k
LIN_RXD



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