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MCIMX503CVM8B bảng dữ liệu(PDF) 85 Page - Freescale Semiconductor, Inc

tên linh kiện MCIMX503CVM8B
Giải thích chi tiết về linh kiện  i.MX50 Applications Processors for Consumer Products
PDF  134 Pages
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MCIMX503CVM8B bảng dữ liệu(HTML) 85 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
i.MX50 Applications Processors for Consumer Products, Rev. 2
Freescale Semiconductor
85
4.9.8
Secure JTAG Controller (SJC) Timing Parameters
Figure 47 depicts the SJC test clock input timing. Figure 48 depicts the SJC boundary scan timing.
Figure 49 depicts the SJC test access port. Figure 50 depicts the TRST timing. The signal parameters are
listed in Table 63.
Figure 47. Test Clock Input Timing Diagram
Table 62. PWM Output Timing Parameter
Ref. No.
Parameter
Min
Max
Unit
1
System CLK frequency1
1 CL of PWMO = 30 pF
0
ipg_clk
MHz
2a
Clock high time
12.29
—
ns
2b
Clock low time
9.91
—
ns
3a
Clock fall time
—
0.5
ns
3b
Clock rise time
—
0.5
ns
4a
Output delay time
—
9.37
ns
4b
Output setup time
8.71
—
ns
TCK
(Input)
VM
VM
VIH
VIL
SJ1
SJ2
SJ2
SJ3
SJ3



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