ADE7816ACPZ datasheet(25/48 Pages) AD

25 / 48 page

Data Sheet

ADE7816

Rev. 0 | Page 25 of 48

ENERGY PHASE CALIBRATION

The ADE7816 is designed to function with a variety of current

transducers, including those that induce inherent phase errors.

A phase error of 0.1° to 0.3° is not uncommon for a current

transformer (CT). These phase errors can vary from part to

part, and they must be corrected to achieve accurate power

readings. The errors associated with phase mismatch are

particularly noticeable at low power factors. The ADE7816

provides a means of digitally calibrating these small phase

errors by introducing a time delay or a time advance.

Because different sensors can be used on each channel, sepa-

rate phase calibration registers are included all six channels.

The PCF_A_COEFF register (Address 0x43B1) can be used to

correct phase errors on Current Channel A. The PCF_B_COEFF

(Address 0x43B2), PCF_C_COEFF (Address 0x43B3), PCF_D_

COEFF (Address 0x43B4), PCF_E_COEFF (Address 0x43B5),

and PCF_F_COEFF (Address 0x43B6) registers control the phase

calibration on the B through F current channels, respectively. All

registers are 24-bit, unsigned.

The ADE7816 uses all pass filters to accurately add time advances

and delays to the current channels with respect to the voltage

channels. A separate filter is included on each of the six current

channels. To adjust the time delay or advance, the coefficient of

these filters must be adjusted. Equation 12, Equation 13, and

Equation 14 show how the coefficients correspond to the phase

offset in radians.

PCF_x_COEFFFRACTION =

)

sin(

sin

)

sin(

−

(12)

If PCF_x_COEFF ≥ 0, then

PCF_x_COEFF = 223 × PCF_x_COEFFFRACTION

(13)

If PCF_x_COEFF < 0, then

PCF_x_COEFF = (223 + 2328) × PCF_x_COEFFFRACTION (14)

where θ is the required current-to-voltage phase adjustment.

8000

)

(

Linefreq

ω =

To simplify this calculation, Analog Devices has a spreadsheet

file that calculates this value. To obtain this spreadsheet, contact

a representative of Analog Devices.

By default, the PCF_x_COEFF registers are set to 0. This setting

does not, however, result in a 0° phase shift. On startup, the

PCF_x_COEFF registers should be set to 0x400C4A for a 50 Hz

system and 0x401235 for a 60 Hz system.

RMS OFFSET CALIBRATION

The ADE7816 includes an rms offset compensation register for

each channel, as follows: IARMSOS (Address 0x438B), IBRMSOS

(Address 0x438C), ICRMSOS (Address 0x438D), IDRMSOS

(Address 0x438E), IERMSOS (Address 0x438F), IFRMSOS

(Address 0x4390), and VRMSOS (Address 0x438A). These 24-bit,

signed registers are used to remove offsets in the current and

voltage rms calculations. The rms offset compensation register

is added to the squared current and voltage signal before the

square root is executed. Equation 15 shows the relationship

between the rms measurement and the offset adjustment.

IxRMSOS

rms

128

(15)

VRMSOS

rms

128

where Irms

0 and Vrms0 are the current and voltage rms

measurement, respectively, without offset correction.

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