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ADE7816ACPZ bảng dữ liệu(PDF) 42 Page - Analog Devices

tên linh kiện ADE7816ACPZ
Giải thích chi tiết về linh kiện  Six Current Channels, One Voltage Channel
PDF  48 Pages
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ADE7816ACPZ bảng dữ liệu(HTML) 42 Page - Analog Devices

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ADE7816
Data Sheet
Rev. 0 | Page 42 of 48
Bits
Bit Name
Default
Value
Description
[5:3]
PGA2[2:0]
0x000
Voltage channel gain selection.
000: gain = 1
001: gain = 2.
010: gain = 4.
011: gain = 8.
100: gain = 16.
101, 110, 111: reserved.
Gain selection for the A, B, and C current channels.
000: gain = 1.
001: gain = 2.
010: gain = 4.
011: gain = 8.
100: gain = 16.
[2:0]
PGA1[2:0]
0x000
101, 110, 111: reserved.
Table 23. CHSIGN Register (Address 0xE617)
Bits
Bit Name
Default
Value
Description
[15:7]
Reserved
0x0000000
These bits should be ignored.
0: the reactive power on the C or F channel is positive.
6
VAR3SIGN
0x0
1: the reactive power on the C or F channel is negative.
5
VAR2SIGN
0x0
0: the reactive power on the B or E channel is positive.
1: the reactive power on the B or E channel is negative.
4
VAR1SIGN
0x0
0: the reactive power on the A or D channel is positive.
1: the reactive power on the A or D channel is negative.
3
Reserved
0x0
This bit should be ignored.
2
W3SIGN
0x0
0: the active power on the C or F channel is positive.
1: the active power on the C or F channel is negative.
1
W2SIGN
0x0
0: the active power on the B or E channel is positive.
1: the active power on the B or E channel is negative.
0
W1SIGN
0x0
0: the active power on the A or D channel is positive.
1: the active power on the A or D channel is negative.
Table 24. CONFIG Register (Address 0xE618)
Bits
Bit Name
Default
Value
Description
[15:8]
Reserved
0x0
These bits should be ignored.
7
SWRST
0x0
Initiates a software reset.
6
HSDCEN
0x0
Enables the HSDC serial port.
[5:1]
Reserved
0x0
These bits should be ignored.
0
INTEN
0x0
Enables the digital integrator.
Table 25. MMODE Register (Address 0xE700)
Bits
Bit Name
Default
Value
Description
[7:5]
Reserved
0x000
These bits should be ignored.
4
PEAKSEL2
0x1
The C or F current channel is selected for peak detection.
3
PEAKSEL1
0x1
The B or E current channel is selected for peak detection.
2
PEAKSEL0
0x1
The A or D current channel is selected for peak detection.
[1:0]
Reserved
0x00
These bits should be ignored.



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