AD9737ABBCZ datasheet(55/64 Pages) AD

55 / 64 page

Data Sheet

AD9737A/AD9739A

Rev. | Page 55 of 64

ANALOG INTERFACE CONSIDERATIONS

ANALOG MODES OF OPERATION

The AD9737A/AD9739A use the quad-switch architecture

shown in Figure 169. The quad-switch architecture masks the

code-dependent glitches that occur in a conventional two-switch

DAC. Figure 170 compares the waveforms for a conventional

DAC and the quad-switch DAC. In the two-switch architecture,

a code-dependent glitch occurs each time the DAC switches to

a different state (that is, D1 to D2). This code-dependent glitching

causes an increased amount of distortion in the DAC. In quad-

switch architecture (no matter what the codes are), there are

always two switches transitioning at each half clock cycle, thus

eliminating the code-dependent glitches. However, a constant

glitch occurs at 2 × DACCLK_x because half the internal switches

change state on the rising DACCLK_x edge whereas the other

half change state on the falling DACCLK_x edge.

VG1

VDD

IOUTP

IOUTN

VG1

VG4

VG3

VG2

DACCLK_x

CLK

LATCHES

DBx[13:0]

VG2

VG3

VG4

Figure 169. AD9739A Quad-Switch Architecture

INPUT

DATA

DACCLK_x

TWO-SWITCH

DAC OUTPUT

FOUR-SWITCH

DAC OUTPUT

(NORMAL MODE)

D9 D10

Figure 170. Two-Switch and Quad-Switch DAC Waveforms

Another attribute of the quad-switch architecture is that it also

enables the DAC core to operate in one of the following two

modes: normal mode and mix-mode. The mode is selected via

SPI Register 0x08, Bits[1:0], with normal mode being the default

value. In the mix-mode, the output is effectively chopped at the

DAC sample rate. This has the effect of reducing the power of

the fundamental signal while increasing the power of the images

centered around the DAC sample rate, thus improving the

output power of these images.

INPUT

DATA

DACCLK_x

FOUR-SWITCH

DAC OUTPUT

(

fS MIX MODE)

–D6

–D7

–D8

–D9

–D10

D10

–D1

–D2

–D3

–D4

–D5

D9 D10

Figure 171. Mix-Mode DAC Waveforms

Figure 171 shows the DAC waveforms for mix-mode. This ability

to change modes provides the user the flexibility to place a

carrier anywhere in the first two Nyquist zones, depending

on the operating mode selected. Switching between the analog

modes reshapes the sinc roll-off that is inherent at the DAC output.

The maximum amplitude in both Nyquist zones is impacted by

this sinc roll-off, depending on where the carrier is placed (see

Figure 172). As a practical matter, the usable bandwidth in the

third Nyquist zone becomes limited at higher DAC clock rates

(that is, >2 GSPS) when the output bandwidth of the DAC core

and the interface network (that is, balun) contributes to

additional roll-off.

FREQUENCY (Hz)

0FS

1.50FS

1.25FS

1.00FS

0.75FS

0.50FS

0.25FS

–35

–30

–25

–20

–15

–10

–5

FIRST

NYQUIST ZONE

SECOND

NYQUIST ZONE

THIRD

NYQUIST ZONE

MIX MODE

NORMAL

MODE

Figure 172. Sinc Roll-Off for Each Analog Operating Mode

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