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CC1021 bảng dữ liệu(PDF) 68 Page - Texas Instruments

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tên linh kiện CC1021
Giải thích chi tiết về linh kiện  Single Chip Low Power RF Transceiver for Narrowband Systems
PDF  94 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
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CC1021 bảng dữ liệu(HTML) 68 Page - Texas Instruments

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CC1021
SWRS045C
Page 68 of 87
SEQUENCING Register (03h)
REGISTER
NAME
Default
value
Active
Description
SEQUENCING[7]
SEQ_PSEL
1
H
Use PSEL pin to start sequencing
0: PSEL pin does not start sequencing. Negative
transitions on DIO starts power-up sequencing if
SEP_DI_DO=1.
1: Negative transitions on the PSEL pin will start power-
up sequencing
SEQUENCING[6:4]
RX_WAIT[2:0]
0
-
Waiting time from PLL enters lock until RX power-up
0: Wait for approx. 32 ADC_CLK periods (26 µs)
1: Wait for approx. 44 ADC_CLK periods (36 µs)
2: Wait for approx. 64 ADC_CLK periods (52 µs)
3: Wait for approx. 88 ADC_CLK periods (72 µs)
4: Wait for approx. 128 ADC_CLK periods (104 µs)
5: Wait for approx. 176 ADC_CLK periods (143 µs)
6: Wait for approx. 256 ADC_CLK periods (208 µs)
7: No additional waiting time before RX power-up
SEQUENCING[3:0]
CS_WAIT[3:0]
10
-
Waiting time for carrier sense from RX power-up
0: Wait 20 FILTER_CLK periods before power down
1: Wait 22 FILTER_CLK periods before power down
2: Wait 24 FILTER_CLK periods before power down
3: Wait 26 FILTER_CLK periods before power down
4: Wait 28 FILTER_CLK periods before power down
5: Wait 30 FILTER_CLK periods before power down
6: Wait 32 FILTER_CLK periods before power down
7: Wait 36 FILTER_CLK periods before power down
8: Wait 40 FILTER_CLK periods before power down
9: Wait 44 FILTER_CLK periods before power down
10: Wait 48 FILTER_CLK periods before power down
11: Wait 52 FILTER_CLK periods before power down
12: Wait 56 FILTER_CLK periods before power down
13: Wait 60 FILTER_CLK periods before power down
14: Wait 64 FILTER_CLK periods before power down
15: Wait 72 FILTER_CLK periods before power down
FREQ_2A Register (04h)
REGISTER
NAME
Default
value
Active
Description
FREQ_2A[7:0]
FREQ_A[22:15]
131
-
8 MSB of frequency control word A
FREQ_1A Register (05h)
REGISTER
NAME
Default
value
Active
Description
FREQ_1A[7:0]
FREQ_A[14:7]
177
-
Bit 15 to 8 of frequency control word A
FREQ_0A Register (06h)
REGISTER
NAME
Default
value
Active
Description
FREQ_0A[7:1]
FREQ_A[6:0]
124
-
7 LSB of frequency control word A
FREQ_0A[0]
DITHER_A
1
H
Enable dithering for frequency A



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