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R5F64112NFB bảng dữ liệu(PDF) 28 Page - Renesas Technology Corp |
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R5F64112NFB bảng dữ liệu(HTML) 28 Page - Renesas Technology Corp |
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28 / 108 page ![]() R01DS0062EJ0120 Rev.1.20 Page 28 of 99 Sep 26, 2011 R32C/111 Group 1. Overview Note: 1. Ports P0_4 to P0_7, P1_0 to P1_4, P3_4 to P3_7, and P9_5 to P9_7 are available in the 80-pin package only. Table 1.19 Pin Definitions and Functions for the 80-/64-pin Package (1/3) Function Symbol I/O Description Power supply VCC1, VSS I Applicable as follows: VCC1 = 3.0 to 5.5 V, VSS = 0 V Connecting pins for decoupling capacitor VDC0, VDC1 — A decoupling capacitor for internal voltage should be connected between VDC0 and VDC1 Analog power supply AVCC, AVSS I Power supply for the A/D converter. AVCC and AVSS should be connected to VCC and VSS, respectively Reset input RESET I The MCU is reset when this pin is driven low CNVSS CNVSS I This pin should be connected to VSS via a resistor Debug port NSD I/O This pin is to communicate with a debugger. It should be connected to VCC1 via a resistor of 1 to 4.7 k Ω Main clock input XIN I Input/output for the main clock oscillator. A crystal, or a ceramic resonator should be connected between pins XIN and XOUT. An external clock should be input at the XIN while leaving the XOUT open Main clock output XOUT O Sub clock input XCIN I Input/output for the sub clock oscillator. A crystal oscillator should be connected between pins XCIN and XCOUT. An external clock should be input at the XCIN while leaving the XCOUT open Sub clock output XCOUT O External interrupt input INT0 to INT5 I Input for external interrupts NMI input P8_5/ NMI I Input for NMI Key input interrupt KI0 to KI3 I Input for the key input interrupt I/O port (1) P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0 to P3_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4, P8_6, P8_7, P9_3, P9_5 to P9_7, P10_0 to P10_7 I/O I/O ports in CMOS. Each port can be programmed to input or output under the control of the direction register. Pull-up resistors are selected for following 4-pin units, but are enabled only for the input pins: Pi_0 to Pi_3 and Pi_4 to Pi_7 (i = 0 to 3, 6 to 10). P7_0 and P7_1 outputs are N-channel open drain Timer A TA0OUT to TA4OUT I/O Timers A0 to A4 input/output. TA0OUT output assigned for port P7_0 is N-channel open drain TA0IN to TA4IN I Timers A0 to A4 input Timer B TB0IN to TB3IN, TB5IN I Timers B0 to B3, and B5 input Three-phase motor control timer output U, U, V, V, W, W O Three-phase motor control timer output |
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