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ICS9220 bảng dữ liệu(PDF) 5 Page - Integrated Device Technology

tên linh kiện ICS9220
Giải thích chi tiết về linh kiện  Programmable RambusTM XDRTM Clock Generator
PDF  17 Pages
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nhà sản xuất  IDT [Integrated Device Technology]
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ICS9220 bảng dữ liệu(HTML) 5 Page - Integrated Device Technology

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ICS9220
1227G—11/05/07
SMBus Table: Reserved Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
Reserved
Reserved
RW
-
-
0
Bit 6
Reserved
Reserved
RW
-
-
0
Bit 5
Reserved
Reserved
RW
-
-
0
Bit 4
Reserved
Reserved
RW
-
-
0
Bit 3
Reserved
Reserved
RW
-
-
0
Bit 2
Reserved
Reserved
RW
-
-
0
Bit 1
Reserved
Reserved
RW
-
-
0
Bit 0
Reserved
Reserved
RW
-
-
0
SMBus Table: Reserved Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
Reserved
Reserved
RW
-
-
0
Bit 6
Reserved
Reserved
RW
-
-
0
Bit 5
Reserved
Reserved
RW
-
-
0
Bit 4
Reserved
Reserved
RW
-
-
0
Bit 3
Reserved
Reserved
RW
-
-
0
Bit 2
Reserved
Reserved
RW
-
-
0
Bit 1
Reserved
Reserved
RW
-
-
0
Bit 0
Reserved
Reserved
RW
-
-
0
SMBus Table: VCO Frequency Control Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
Post Divider
PLL Post Divide
RW
Divide by 2
Divide by 4
1
Bit 6
Reserved
Reserved
RW
-
-
0
Bit 5
Reserved
Reserved
RW
-
-
0
Bit 4
Reserved
Reserved
RW
-
-
0
Bit 3
M DIV3
RW
0
Bit 2
M DIV2
RW
0
Bit 1
M DIV1
RW
1
Bit 0
M DIV0
RW
0
-
-
Byte 3
-
-
-
-
-
-
-
-
-
-
-
Byte 4
Byte 5
-
-
-
-
-
-
-
M Divider Programming
b(3:0)
The decimal representation of M
and N Divider in Byte 5 and 6 will
configure the PLL VCO frequency.
VCO frequency = 100 x
{[NDIV(5:0)+2]/[MDIV(3:0)+2]}
-
-
-
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