SM5K3 datasheet(13/28 Pages) SHARP

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SM5K3/SM5K4/SM5K5

- 13 -

Output Latch Register and Mode Register

The

SM5K3/5K4/5K5

contain

output-latch

registers and 8 mode-registers which either latch

contents of output ports or control some functions

of the SM5K3/5K4/5K5.

These registers, their functions and available

transfer instructions are shown in Table 1 below.

An output latch register sets the output level of the

pin to which it is connected.

Refer to the section of “MODE REGISTERS”

concerning about the details mode registers.

SYMBOL

FUNCTION

OUT

INL

OUT

IN/TPB

ANP/ORP

CONTENT OF BL

Output register

–

Input register

–

I/O register (independent)

–

Input register (and analog input)

–

Control register

–

I/O register

–

I/O register

–

∗

A/D data/control register

–

∗

A/D data register

–

∗

Timer/counter register

–

∗

Timer/modulo register

–

Timer control register

–

Interrupt mask register

–

P2 directional register

–

Table 1

Output Latch Registers and Mode Registers

∗ 8-bit register

NOTE :

Bit 4 (R84) in the R8 register is read only.

(Read or write operation of this bit does not affect any other operation.)

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