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PIC16F1847 bảng dữ liệu(PDF) 203 Page - Microchip Technology

tên linh kiện PIC16F1847
Giải thích chi tiết về linh kiện  18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology
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PIC16F1847 bảng dữ liệu(HTML) 203 Page - Microchip Technology

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 2011 Microchip Technology Inc.
Preliminary
DS41453B-page 203
PIC16(L)F1847
TABLE 23-1:
SUMMARY OF REGISTERS ASSOCIATED WITH DATA SIGNAL MODULATOR MODE
REGISTER 23-4:
MDCARL: MODULATION LOW CARRIER CONTROL REGISTER
R/W-x/u
R/W-x/u
R/W-x/u
U-0
R/W-x/u
R/W-x/u
R/W-x/u
R/W-x/u
MDCLODIS
MDCLPOL
MDCLSYNC
—
MDCL<3:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
MDCLODIS:
Modulator Low Carrier Output Disable bit
1
= Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
is disabled
0
= Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
is enabled
bit 6
MDCLPOL:
Modulator Low Carrier Polarity Select bit
1
= Selected low carrier signal is inverted
0
= Selected low carrier signal is not inverted
bit 5
MDCLSYNC:
Modulator Low Carrier Synchronization Enable bit
1
= Modulator waits for a falling edge on the low time carrier signal before allowing a switch to the high
time carrier
0
= Modulator Output is not synchronized to the low time carrier signal(1)
bit 4
Unimplemented:
Read as ‘0’
bit 3-0
MDCL<3:0>
Modulator Data High Carrier Selection bits (1)
1111
= Reserved. No channel connected.
•
•
•
1000
= Reserved. No channel connected.
0111
= CCP4 output (PWM Output mode only)
0110
= CCP3 output (PWM Output mode only)
0101
= CCP2 output (PWM Output mode only)
0100
= CCP1 output (PWM Output mode only)
0011
= Reference Clock module signal
0010
= MDCIN2 port pin
0001
= MDCIN1 port pin
0000
=VSS
Note 1:
Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
MDCARH
MDCHODIS
MDCHPOL
MDCHSYNC
—
MDCH<3:0>
202
MDCARL
MDCLODIS
MDCLPOL
MDCLSYNC
—
MDCL<3:0>
203
MDCON
MDEN
MDOE
MDSLR
MDOPOL
MDOUT
—
—
MDBIT
200
MDSRC
MDMSODIS
—
—
—
MDMS<3:0>
201
Legend:
— = unimplemented, read as ‘0’. Shaded cells are not used in the Data Signal Modulator mode.



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