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AS5050 bảng dữ liệu(PDF) 8 Page - ams AG

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AS5050 bảng dữ liệu(HTML) 8 Page - ams AG

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www.austriamicrosystems.com
Revision 1.12
8 - 22
AS5050
Datasheet - Detailed Descr i p ti on
Figure 4. Interrupt Chaining
7.2 SPI Communication
The transmitted data consists of 14-bit data, an Error-Flag and a Parity bit. When writing data to the chip, the Error-Flag is not applicable. The
Parity is generated from the upper 15-bit and forms an even parity over the whole frame. The Error-Flag indicates that a failure occurred in a
previous transmission.
7.2.1 Command Package
Every command sent to the AS5050 is represented with the following layout.
7.2.2 Read Package (Value Read from AS5050)
The read frame always contains two alarm bits, the error and parity flags and the addressed data of the previous read command.
Table 6. Command Package
Bit
MSB
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
RWn
Address <13:0>
PAR
Bit
Description
RWn
Indicates read or write command
Address
14-bit address code
PAR
Parity bit (EVEN)
Table 7. Read Package
Bit
MSB
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
Data <13:0>
EF
PAR
Bit
Description
Data
14-bit addressed data
EF
Error flag indicating a transmission error in a previous host
transmission
PAR
Parity bit (EVEN)
XINT
XENINT
=1
0
1
XINT
XENINT
0
1
AS5050 (Device A)
AS5050 (Device B)
Micro
controller
XINT
INT
mode
INT
mode
&
=1
&



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