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MPC8572ECLPXATLD bảng dữ liệu(PDF) 26 Page - Freescale Semiconductor, Inc

tên linh kiện MPC8572ECLPXATLD
Giải thích chi tiết về linh kiện  MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
PDF  140 Pages
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MPC8572ECLPXATLD bảng dữ liệu(HTML) 26 Page - Freescale Semiconductor, Inc

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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
26
Freescale Semiconductor
DDR2 and DDR3 SDRAM Controller
Figure 6 provides the AC test load for the DDR2 and DDR3 Controller bus.
Figure 6. DDR2 and DDR3 Controller bus AC Test Load
6.2.3
DDR2 and DDR3 SDRAM Differential Timing Specifications
This section describes the DC and AC differential electrical specifications for the DDR2 and DDR3
SDRAM controller interface of the MPC8572E.
NOTE
VID specifies the input differential voltage |VTR -VCP| required for
switching, where VTR is the true input signal (such as MCK or MDQS) and
VCP is the complementary input signal (such as MCK or MDQS).
Table 18 provides the differential specifications for the MPC8572E differential signals MDQS/MDQS and
MCK/MCK when in DDR2 mode.
Table 18. DDR2 SDRAM Differential Electrical Characteristics
Parameter/Condition
Symbol
Min
Max
Unit
Notes
DC Input Signal Voltage
VIN
–0.3
GVDD + 0.3
V
—
DC Differential Input Voltage
VID
——
mV
—
AC Differential Input Voltage
VIDAC
——
mV
—
DC Differential Output Voltage
VOH
——
mV
—
AC Differential Output Voltage
VOHAC
JEDEC: 0.5
JEDEC: GVDD + 0.6
V
—
AC Differential Cross-point Voltage
VIXAC
——
mV
—
Input Midpoint Voltage
VMP
——
mV
—
Output
Z0 = 50 Ω
RL = 50 Ω
GVDD/2
VTR
VCP
GND
GVDD
VMP
VID or VOD
VIX or VOX
VIN



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