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PIC24F04KA201 bảng dữ liệu(PDF) 196 Page - Microchip Technology |
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PIC24F04KA201 bảng dữ liệu(HTML) 196 Page - Microchip Technology |
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196 / 224 page ![]() PIC24F04KA201 FAMILY DS39937B-page 194 Preliminary © 2009 Microchip Technology Inc. TABLE 26-9: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS DC CHARACTERISTICS Standard Operating Conditions: 1.8V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial Param No. Sym Characteristic Min Typ(1) Max Units Conditions VIL Input Low Voltage(4) —— — — DI10 I/O Pins VSS — 0.2 VDD V DI15 MCLR VSS — 0.2 VDD V DI16 OSCI (XT mode) VSS — 0.2 VDD V DI17 OSCI (HS mode) VSS — 0.2 VDD V DI18 I/O Pins with I2C™ Buffer VSS — 0.3 VDD V SMBus disabled DI19 I/O Pins with SMBus Buffer VSS — 0.8 V SMBus enabled VIH Input High Voltage(4) —— — — DI20 I/O Pins: with Analog Functions Digital Only 0.8 VDD 0.8 VDD — — VDD VDD V V DI25 MCLR 0.8 VDD —VDD V DI26 OSCI (XT mode) 0.7 VDD —VDD V DI27 OSCI (HS mode) 0.7 VDD —VDD V DI28 I/O Pins with I2C Buffer: with Analog Functions Digital Only 0.7 VDD 0.7 VDD — — VDD VDD V V DI29 I/O Pins with SMBus 2.1 — VDD V2.5V ≤ VPIN ≤ VDD DI30 ICNPU CNx Pull-up Current 50 250 500 μAVDD = 3.3V, VPIN = VSS IIL Input Leakage Current(2,3) DI50 I/O Ports — 0.050 ±0.100 μAVSS ≤ VPIN ≤ VDD, Pin at high-impedance DI51 VREF+, VREF-, AN0, AN1 — 0.300 ±0.500 μAVSS ≤ VPIN ≤ VDD, Pin at high-impedance DI55 MCLR —— ±5.0 μAVSS ≤ VPIN ≤ VDD DI56 OSCI — — ±5.0 μAVSS ≤ VPIN ≤ VDD, XT and HS modes Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin. 4: Refer to Table 1-2 for I/O pin buffer types. |
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