HT68F03 datasheet(75/139 Pages) HOLTEK

75 / 139 page

HT66F03/HT66F04/HT68F03/HT68F04

Rev. 1.00

April 16, 2010

Enhanced Type TM - ETM

The Enhanced Type TM contains five operating modes, which are Compare Match Output, Timer/Event Counter, Cap-

ture Input, Single Pulse Output and PWM Output modes. The Enhanced TM can also be controlled with an external in-

put pin and can drive three or two external output pins.

CTM

Name

TM No.

TM Input Pin

TM Output Pin

HT66F03/HT68F03/HT68F04

¾¾¾¾

HT66F04

10-bit ETM

TCK2

TP2A, TP2B

C C R P

C C R A

T n C C L R

C o m p a r a t o r P M a t c h

C o m p a r a t o r A M a t c h

T n C K 2 ~ T n C K 0

T n O N

T n P A U

b 7 ~ b 9

3 - b i t C o m p a r a t o r P

1 0 - b i t

C o m p a r a t o r A

C o u n t e r

C l e a r

1 0 - b i t U p / D o w n C o u n t e r

T n P F I n t e r r u p t

T n A F

I n t e r r u p t

b 0 ~ b 9

E d g e

D e t e c t o r

T n A I O 1 , T n A I O 0

T n A M 1 , T n A M 0

T n A I O 1 , T n A I O 0

T n A P O L

T n A O C

P o l a r i t y

C o n t r o l

O u t p u t

C o n t r o l

T P n A

T C K n

1 1 1

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

f S Y S / 4

f S Y S

f H / 1 6

f H / 6 4

f T B C

R e s e r v e d

T n B F

I n t e r r u p t

T n B M 1 , T n B M 0

T n B I O 1 , T n B I O 0

T n B P O L

T n B O C

P o l a r i t y

C o n t r o l

O u t p u t

C o n t r o l

C C R B

C o m p a r a t o r B M a t c h

1 0 - b i t

C o m p a r a t o r B

E d g e

D e t e c t o r

T n I O 1 , T n I O 0

T P n B

Enhanced Type TM Block Diagram

Enhanced TM Operation

At its core is a 10-bit count-up/count-down counter

which is driven by a user selectable internal or external

clock source. There are three internal comparators with

the names, Comparator A, Comparator B and Com-

parator P. These comparators will compare the value in

the counter with the CCRA, CCRB and CCRP registers.

The CCRP comparator is 3-bits wide whose value is

compared with the highest 3-bits in the counter while

CCRA and CCRB are 10-bits wide and therefore com-

pared with all counter bits.

The only way of changing the value of the 10-bit counter

using the application program, is to clear the counter by

changing the TnON bit from low to high. The counter will

also be cleared automatically by a counter overflow or a

compare match with one of its associated comparators.

When these conditions occur, a TM interrupt signal will

also usually be generated. The Enhanced Type TM can

operate in a number of different operational modes, can

be driven by different clock sources including an input

pin and can also control output pins. All operating setup

conditions are selected using relevant internal registers.

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