P89LPC985FDH datasheet(60/85 Pages) NXP

60 / 85 page

P89LPC980_982_983_985_2

Preliminary data sheet

Rev. 02 — 8 February 2010

60 of 85

NXP Semiconductors

P89LPC980/982/983/985

8-bit microcontroller with accelerated two-clock 80C51 core

8.3 Block diagram

8.4 ADC operating modes

8.4.1 Fixed channel, single conversion mode

A single input channel can be selected for conversion. A single conversion will be

performed and the result placed in the result register pair which corresponds to the

selected input channel. An interrupt, if enabled, will be generated after the conversion

completes.

8.4.2 Fixed channel, continuous conversion mode

A single input channel can be selected for continuous conversion. The results of the

conversions will be sequentially placed in the eight result register. The user may select

whether an interrupt can be generated after every four or every eight conversions.

Additional conversion results will again cycle through the result register pairs, overwriting

the previous results. Continuous conversions continue until terminated by the user.

8.4.3 Auto scan, single conversion mode

Any combination of the eight input channels can be selected for conversion. A single

conversion of each selected input will be performed and the result placed in the result

whether an interrupt, if enabled, will be generated after either the first four conversions

have occurred or all selected channels have been converted. If the user selects to

generate an interrupt after the four input channels have been converted, a second

interrupt will be generated after the remaining input channels have been converted. If only

a single channel is selected this is equivalent to single channel, single conversion mode.

(1) Only on the P89LPC985.

Fig 20. ADC block diagram

comp

AD00

CONTROL

LOGIC

AD01

AD02

AD03

AD04(1)

AD05(1)

AD06(1)

AD07(1)

SAR

input MUX

002aae543

DAC0

CCLK

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