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09HSI-S043-R0-CHT bảng dữ liệu(PDF) 59 Page - Hirose Electric |
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09HSI-S043-R0-CHT bảng dữ liệu(HTML) 59 Page - Hirose Electric |
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59 / 71 page ![]() Signal Integrity Report – IT3 (25mm) Page 59 Center pin of IT3 connector with via transition in the 16th PCB routing layer. 152.4mm (6 inches) PCB trace from driver to IT3 connector, and 152.4mm (6 inches) PCB trace from IT3 connector to receiver, including via transition to the receiver. Note: Since the time steps used for the simulations were of 1ps, the timing jitter values have an error margin of 1ps. The eye height is defined as the absolute maximum eye opening. Figure 97 Base case 1, 2 and full channel eye diagram at single-ended receiver input for 1600Mbps data rate with routing on layer 16 and 14 FEXT Timing Jitter (ps) Eye Height (mV) Data Rate (Mbps) IT3 Base Case 1 ΔIT3 ΔIT3 (%) IT3 Base Case 1 ΔIT3 ΔIT3 (%) 1600 39.12 34.51 4.61 0.74 751.94 748.68 3.26 0.44 Table 24 Comparison of eye height and timing fuzz between single-ended full channel and Base Case 1 at the receiver’s input with 14 FEXT Timing Jitter (ps) Eye Height (mV) Data Rate (Mbps) IT3 Base Case 2 ΔIT3 ΔIT3 (%) IT3 Base Case 2 ΔIT3 ΔIT3 (%) 1600 39.12 35.86 3.26 0.52 751.94 768.11 -16.17 -2.11 Table 25 Comparison of eye height and timing fuzz between single-ended full channel and Base Case 2 at the receiver’s input with 14 FEXT |
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