DM9102DEP datasheet(23/70 Pages) DAVICOM

23 / 70 page

Final

Version: DM9102D-DS-F01

May 10, 2006

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

Bit

Name

Default

Description

31:0

RDBA

00000000H,

Receive Descriptor Base Address

This register defines base address of receive descriptor-chain. The receive

descriptor- polling command, after CR3 is set, will make DM9102D to fetch the

descriptor at the Base-Address.

This is a working register, so the value of reading is unpredictable.

6.2.5 Transmit Descriptor Base Address (CR4)

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

Bit

Name

Default

Description

31:0

TDBA

00000000H,

Transmit Descriptor Base Address

This register defines base address of transmit descriptor-chain. The transmit

descriptor- polling command after CR4 is set to make DM9102D fetch the

descriptor at the Base-Address.

This is a working register, so the value of reading is unpredictable.

6.2.6 Network Status Report Register (CR5)

Note: Bits [13:0] can be cleared by written 1 to them respectively.

Bit

Name

Default

Description

31:26

Reserved

000000,RO Reserved

25:23

SBEB

000,RO

System Bus Error Bits

These bits are read only and used to indicate the type of system bus fatal error. Valid

only when System Bus Error is set. The mapping bits are shown below

Bit25

Bit24

Bit23

Bus Error Type

Parity error

Master abort

Slave abort

Reserved

22:20

TXPS

000,RO

Transmit Process State

These bits are read only and used to indicate the state of transmit process

The mapping table is shown below

Bit22 Bit21 Bit20

Process State

Transmit process stopped

Fetch transmit descriptor

Move Setup Frame from the host memory

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