ATmega64A datasheet(296/392 Pages) ATMEL

296 / 392 page

296

8160C–AVR–07/09

ATmega64A

Note:

1. Program the Fuse bits before programming the Lock bits.

2. “1” means unprogrammed, “0” means programmed

27.2

Fuse Bits

The ATmega64A has three fuse bytes. Table 27-3 - Table 27-5 describe briefly the functionality

of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are read as

logical zero, “0”, if they are programmed.

Note:

1. See “ATmega103 and ATmega64A Compatibility” on page 4 for details.

2. See “WDTCR – Watchdog Timer Control Register” on page 57 for details.

No restrictions for SPM or LPM accessing the Boot Loader

section.

SPM is not allowed to write to the Boot Loader section.

SPM is not allowed to write to the Boot Loader section, and LPM

executing from the Application section is not allowed to read

from the Boot Loader section. If Interrupt Vectors are placed in

the Application section, interrupts are disabled while executing

from the Boot Loader section.

LPM executing from the Application section is not allowed to

read from the Boot Loader section. If Interrupt Vectors are

placed in the Application section, interrupts are disabled while

executing from the Boot Loader section.

Table 27-2.

Lock Bit Protection Modes

(2) (Continued)

Memory Lock Bits

Protection Type

Table 27-3.

Extended Fuse Byte

Fuse Low Byte

Bit no

Description

Default Value

–7

–

–6

–

–5

–

–4

–

–3

–

–2

–

M103C(1)

ATmega103 compatibility mode

0 (programmed)

WDTON(2)

Watchdog Timer always on

1 (unprogrammed)

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