ATmega64A datasheet(243/392 Pages) ATMEL

tên linh kiện	ATmega64A

Giải thích chi tiết về linh kiện	8-bit Microcontroller with 64K Bytes In-System Programmable Flash

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243

8160C–AVR–07/09

ATmega64A

Figure 23-9. ADC Power Connections

23.7.3

Offset Compensation Schemes

The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-

surements as much as possible. The remaining offset in the analog path can be measured

directly by selecting the same channel for both differential inputs. This offset residue can be then

subtracted in software from the measurement results. Using this kind of software based offset

correction, offset on any channel can be reduced below one LSB.

23.7.4

ADC Accuracy Definitions

An n-bit single-ended ADC converts a voltage linearly between GND and V

REF in 2

n steps

(LSBs). The lowest code is read as 0, and the highest code is read as 2

n - 1.

Several parameters describe the deviation from the ideal behavior:

• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition

(at 0.5 LSB). Ideal value: 0 LSB.

VCC

GND

100 nF

(ADC0) PF0

(ADC7) PF7

(ADC1) PF1

(ADC2) PF2

(ADC3) PF3

(ADC4) PF4

(ADC5) PF5

(ADC6) PF6

AREF

GND

AVCC

(AD0) PA0

μΗ

ATmega64A bảng dữ liệu(PDF) 243 Page - ATMEL Corporation