ATmega32A datasheet(272/352 Pages) ATMEL

272 / 352 page

272

8155B–AVR–07/09

ATmega32A

changed. A Chip Erase must be performed before the Flash and/or the EEPROM are

reprogrammed.

Note:

1. The EEPRPOM memory is preserved during chip erase if the EESAVE Fuse is programmed.

Load Command “Chip Erase”

Set XA1, XA0 to “10”. This enables command loading.

Set BS1 to “0”.

Set DATA to “1000 0000”. This is the command for Chip Erase.

Give XTAL1 a positive pulse. This loads the command.

Give WR a negative pulse. This starts the Chip Erase. RDY/BSY goes low.

Wait until RDY/BSY goes high before loading a new command.

26.7.4

Programming the Flash

The Flash is organized in pages, see Table 26-5 on page 269. When programming the Flash,

the program data is latched into a page buffer. This allows one page of program data to be pro-

grammed simultaneously. The following procedure describes how to program the entire Flash

memory:

A. Load Command “Write Flash”

Set XA1, XA0 to “10”. This enables command loading.

Set BS1 to “0”.

Set DATA to “0001 0000”. This is the command for Write Flash.

Give XTAL1 a positive pulse. This loads the command.

B. Load Address Low byte

Set XA1, XA0 to “00”. This enables address loading.

Set BS1 to “0”. This selects low address.

Set DATA = Address low byte ($00 - $FF).

Give XTAL1 a positive pulse. This loads the address low byte.

C. Load Data Low Byte

Set XA1, XA0 to “01”. This enables data loading.

Set DATA = Data low byte ($00 - $FF).

Give XTAL1 a positive pulse. This loads the data byte.

D. Load Data High Byte

Set BS1 to “1”. This selects high data byte.

Set XA1, XA0 to “01”. This enables data loading.

Set DATA = Data high byte ($00 - $FF).

Give XTAL1 a positive pulse. This loads the data byte.

E. Latch Data

Set BS1 to “1”. This selects high data byte.

Give PAGEL a positive pulse. This latches the data bytes. (See Figure 26-3 for signal

waveforms)

F. Repeat B through E until the entire buffer is filled or until all data within the page is loaded.

While the lower bits in the address are mapped to words within the page, the higher bits address

the pages within the FLASH. This is illustrated in Figure 26-2 on page 273. Note that if less than

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