ATmega32A datasheet(73/352 Pages) ATMEL

73 / 352 page

8155B–AVR–07/09

ATmega32A

14. 8-bit Timer/Counter0 with PWM

14.1

Features

• Single Compare Unit Counter

• Clear Timer on Compare Match (Auto Reload)

• Glitch-free, Phase Correct Pulse Width Modulator (PWM)

• Frequency Generator

• External Event Counter

• 10-bit Clock Prescaler

• Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)

14.2

Overview

Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-

fied block diagram of the 8-bit Timer/Counter is shown in Figure 14-1. For the actual placement

of I/O pins, refer to “Pinout ATmega32A” on page 2. CPU accessible I/O Registers, including I/O

bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed

in the “Register Description” on page 84.

Figure 14-1. 8-bit Timer/Counter Block Diagram

14.2.1

Registers

The Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interrupt

request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag

Timer/Counter

TCNTn

Waveform

Generation

OCn

= 0

Control Logic

= 0xFF

BOTTOM

count

clear

direction

TOVn

(Int.Req.)

OCRn

TCCRn

Clock Select

Edge

Detector

( From Prescaler )

clkTn

TOP

OCn

(Int.Req.)

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