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ATmega1284P bảng dữ liệu(PDF) 272 Page - ATMEL Corporation |
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ATmega1284P bảng dữ liệu(HTML) 272 Page - ATMEL Corporation |
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272 / 380 page ![]() 272 8059D–AVR–11/09 ATmega1284P 23.6 ATmega1284P Boundary-scan Order Table 23-1 shows the Scan order between TDI and TDO when the Boundary-scan chain is selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The scan order follows the pin-out order as far as possible. Therefore, the bits of Port A and Port K is scanned in the opposite bit order of the other ports. Exceptions from the rules are the Scan chains for the analog circuits, which constitute the most significant bits of the scan chain regard- less of which physical pin they are connected to. In Figure 23-3, PXn. Data corresponds to FF0, PXn. Control corresponds to FF1, PXn. Bit 4, 5, 6 and 7 of Port F is not in the scan chain, since these pins constitute the TAP pins when the JTAG is enabled. Table 23-1. ATmega1284P Boundary-scan Order Bit Number Signal Name Module 56 PB0.Data Port B 55 PB0.Control 54 PB1.Data 53 PB1.Control 52 PB2.Data 51 PB2.Control 50 PB3.Data 49 PB3.Control 48 PB4.Data 47 PB4.Control 46 PB5.Data 45 PB5.Control 44 PB6.Data 43 PB6.Control 42 PB7.Data 41 PB7.Control 40 RSTT Reset Logic (Observe Only) |
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