EN56Q64-104FIP datasheet(35/60 Pages) EON

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This Data Sheet may be revised by subsequent versions

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or modifications due to changes in technical specifications.

EN25Q64

Rev. E, Issue Date: 2009/10/19

Write Suspend During Sector Erase or Block Erase

Issuing a Write Suspend instruction during Sector Erase or Block Erase allows the host to program or

read any sector that was not being erased. The device will ignore any programming commands

pointing to the suspended sector(s). Any attempt to read from the suspended sector(s) will out put

unknown data because the Sector or Block Erase will be incomplete.

To execute a Write Suspend operation, the host drives CS# low, sends the Write Suspend command

cycle (B0h), then drives CS# high. A cycle is two nibbles long, most significant nibble first. The

Suspend Status register indicates that the erase has been suspended by changing the WSE bit from

“0” to “1”, but the device will not accept another command until it is ready. To determine when the

device will accept a new command, poll the WIP bit in the Suspend Status register or wait tws.

Write Suspend During Page Programming

Issuing a Write Suspend instruction during Page Programming allows the host to erase or read any

sector that is not being programmed. Erase commands pointing to the suspended sector(s) will be

ignored. Any attempt to read from the suspended page will output unknown data because the program

will be incomplete.

To execute a Write Suspend operation, the host drives CS# low, sends the Write Suspend command

cycle (B0h), then drives CS# high. A cycle is two nibbles long, most significant nibble first. The

Suspend Status register indicates that the programming has been suspended by changing the WSP bit

from “0” to “1”, but the device will not accept another command until it is ready. To determine when the

device will accept a new command, poll the WIP bit in the Suspend Status register or wait tws.

The instruction sequence is shown in Figure 20.1 while using the Enable Quad I/O (EQIO) (38h) command.

Write Resume (30h)

Write Resume restarts a Write command that was suspended, and changes the suspend status bit in

the Suspend Status register (WSE or WSP) back to “0”.

The instruction sequence is shown in Figure 20. To execute a Write Resume operation, the host drives

CS# low, sends the Write Resume command cycle (30h), then drives CS# high. A cycle is two nibbles

long, most significant nibble first. To determine if the internal, self-timed Write operation completed, poll

the WIP bit in the Suspend Status register, or wait the specified time tSE, tBE or tPP for Sector Erase,

Block Erase, or Page Programming, respectively. The total write time before suspend and after resume

will not exceed the uninterrupted write times tSE, tBE or tPP.

The instruction sequence is shown in Figure 20.1 while using the Enable Quad I/O (EQIO) (38h) command.

Figure 20. Write Resume Instruction Sequence Diagram

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