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MB91F613 bảng dữ liệu(PDF) 75 Page - fujitsu semiconductor |
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MB91F613 bảng dữ liệu(HTML) 75 Page - fujitsu semiconductor |
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75 / 104 page ![]() MB91610 Series DS07-16907-2E 75 (3) Conditions of PLL (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) (4) Regulator Voltage Stabilization Wait Time (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) Note : This is the time from when the external power supply stabilizes (after reaching 3.0 V). (5) Reset Input Standards (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) * : After the supply voltage has stabilized, it takes a further 50 μs until the internal supply stabilizes. Hold the input to the INIT pin during that period. • At power-on • When in stop mode • When in sub mode and sub watch mode when the main oscillation is stopped. Parameter Symbol Value Unit Remarks Min Typ Max PLL oscillation stabilization wait time (LOCK UP time) tLOCK 600 ⎯⎯ μs Time from when the PLL starts operating until the oscillation stabilizes PLL oscillation stabilization wait time for OSDC (LOCK UP time) tL 10 ⎯⎯ ms PLL input clock frequency fPLLI 4 ⎯ 24 MHz PLL multiple rate ⎯ 4 ⎯ 24 multiplied by ODS × PMS PLL macro oscillation clock frequency fPLLO 96 ⎯ 100 MHz Parameter Symbol Value Unit Remarks Min Max Regulator voltage stabilization wait time tREG 50 ⎯μs Time taken for the regulator voltage to stabilize Parameter Symbol Pin name Condi- tions Value Unit Remarks Min Max Reset input time (At power-on, main oscillation stop mode) tINITX INIT ⎯ Oscillation time of oscillator + 10 tCYLH ⎯ ns * Reset input time (At other times) 10 tCYLH ⎯ ns Reset input rise time and fall time tINITXF tINITXR ⎯ 10 ms INIT tINITX VILS VILS tINITXR tINITXF VIHS VIHS |
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