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PCF8579T/1 bảng dữ liệu(PDF) 20 Page - NXP Semiconductors

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PCF8579T/1 bảng dữ liệu(HTML) 20 Page - NXP Semiconductors

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PCF8579_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 11 May 2009
20 of 41
NXP Semiconductors
PCF8579
LCD column driver for dot matrix graphic displays
8.9 RAM access
There are three RAM-access modes:
• Character
• Half-graphic
• Full-graphic
These modes are specified by the bits G[1:0] of the RAM-access command. The
RAM-access command controls the order in which data is written to or read from the RAM
(see Figure 17).
To store RAM data, the user specifies the location into which the first byte will be loaded
(see Figure 16):
• Device subaddress (specified by the device-select command)
• RAM X-address (specified by the bits X[5:0] of the load-X-address command)
• RAM bank (specified by the bits Y[1:0] of the RAM-access command)
Subsequent data bytes will be written or read according to the chosen RAM-access mode.
Device subaddresses are automatically incremented between devices until the last device
is reached. If the last device has subaddress 15, further display data transfers will lead to
a wrap-around of the subaddress to 0.
Fig 15. RAM addressing scheme
001aaj920
LSB
1 byte
0
X address
X max
0
Y max
Y address
MSB



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