LPC2921 datasheet(4/83 Pages) NXP

4 / 83 page

LPC2921_23_25_1

Preliminary data sheet

Rev. 01 — 15 June 2009

4 of 83

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN, LIN, and USB

Block diagram

Grey-shaded blocks represent peripherals and memory regions accessible by the GPDMA.

Fig 1.

LPC2921/2923/2925 block diagram

EMBEDDED FLASH

512/256/128 kB

002aae224

ARM968E-S

DTCM

16 kB

ITCM

16 kB

TEST/DEBUG

INTERFACE

slave

master

1 master

2 slaves

master

GPDMA CONTROLLER

GPDMA REGISTERS

16 kB

EEPROM

EMBEDDED SRAM 16 kB

(LPC2925 only)

SYSTEM CONTROL

TIMER0/1 MTMR

CAN0/1

GLOBAL

ACCEPTANCE

FILTER

PWM0/1/2/3

3.3 V ADC1/2

EVENT ROUTER

EMBEDDED SRAM 16 kB

GENERAL PURPOSE I/O

PORTS 0/1/5

TIMER 0/1/2/3

SPI0/1/2

RS-485 UART0/1

WDT

AHB TO APB

BRIDGE

AHB TO DTL

BRIDGE

VECTORED

INTERRUPT

CONTROLLER

master

slave

USB DEVICE

CONTROLLER

slave

AHB TO DTL

BRIDGE

AHB TO APB

BRIDGE

QUADRATURE

ENCODER

CHIP FEATURE ID

AHB TO APB

BRIDGE

I2C0/1

UART/LIN0/1

AHB TO APB

BRIDGE

AHB

MULTI-

LAYER

MATRIX

LPC2921/2923/2925

JTAG

interface

8 kB SRAM

general subsystem

power, clock, and

reset subsystem

MSC subsystem

networking subsystem

peripheral subsystem

CLOCK

GENERATION

UNIT

POWER

MANAGEMENT

UNIT

RESET

GENERATION

UNIT

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