TMS77C82 datasheet(38/73 Pages) TI

38 / 73 page

TMS370Cx6x

8-BIT MICROCONTROLLER

SPNS033C – SEPTEMBER 1995 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

serial peripheral interface (SPI) module (continued)

The SPI block diagram is illustrated in Figure 14.

SPIBUF Buffer

SPIDAT

Data Register

SPIBUF.7-0

State Control

SPI CHAR

SPI BIT RATE

CLOCK POLARITY

SPI INT FLAG

SPICTL.6

SPIINT ENA

SPICTL.0

RECEIVER

OVERRUN

SPIDAT.7-0

SPICTL.1

TALK

SPICCR.2-0

SPICCR.5-3

System

Clock

SPICCR.6

SPICLK

MASTER/SLAVE†

SPICTL.7

Level 2 INT

SPIPRI.6

SPIPC2.7-4

SPISIMO

SPICTL.2

SPIPC1.3-0

SPISOMI

SPIPC2.3-0

Level 1 INT

† The diagram is shown in slave mode.

Figure 14. SPI Block Diagram

serial communications interface 1 (SCI1) module

The TMS370x6x devices include a serial communications interface (SCI1) module. The SCI1 module supports

digital communications between the TMS370 devices and other asynchronous peripherals and uses the

standard non-return-to-zero (NRZ) format. The SCI1’s receiver and transmitter are double buffered, and each

has its own separate enable and interrupt bits. Both can be operated independently or simultaneously in the

full-duplex mode. To ensure data integrity, the SCI1 checks received data for break detection, parity, overrun,

and framing errors. The speed of bit rate (baud) is programmable to over 65,000 different speeds through a

16-bit baud-select register.

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