SN74ACT3638

512

× 32 × 2

CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY

SCAS228D – JUNE 1992 – REVISED APRIL 1998

22

POST OFFICE BOX 655303

CLKA

IRA

tsu(RM)

th(RM)

RTM

tsk1†

FIFO1 Filled to First Retransmit Word

CLKB

tpd(C-IR)

12

One or More FIFO1 Write Locations

Available

† tsk1 is the minimum time between a rising CLKB edge and a rising CLKA edge for IRA to transition high in the next CLKA cycle. If the time

between the rising CLKB edge and rising CLKA edge is less than tsk1, then IRA may transition high one CLKA cycle later than shown.

Figure 19. IRA Timing From the End of Retransmit Mode When One or More

FIFO1 Write Locations Are Available

CLKA

AFA

tsu(RM)

th(RM)

RTM

tsk2‡

(512 – Y1) or More Words Past First Retransmit Word

CLKB

tpd(C-AE)

12

(Y1+ 1) or More Write Locations Available

‡ tsk2 is the minimum time between a rising CLKB edge and a rising CLKA edge for AFA to transition high in the next CLKA cycle. If the time

between the rising CLKB edge and rising CLKA edge is less than tsk2, then AFA may transition high one CLKA cycle later than shown.

NOTE A: Y is the value loaded in the almost-full flag offset register.

Figure 20. AFA Timing From the End of Retransmit Mode When (Y1 + 1) or More

FIFO1 Write Locations Are Available