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ADATE305 bảng dữ liệu(PDF) 5 Page - Analog Devices

tên linh kiện ADATE305
Giải thích chi tiết về linh kiện  250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH
PDF  56 Pages
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ADATE305 bảng dữ liệu(HTML) 5 Page - Analog Devices

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ADATE305
Rev. 0 | Page 5 of 56
DRIVER
VH − VL ≥ 200 mV (to meet dc/ac specifications).
Table 2.
Parameter
Min
Typ
Max
Unit
Test
Level
Conditions/Comments
DC SPECIFICATIONS
High-Speed Differential Logic
Input Characteristics (DATA, RCV)
Input Termination Resistance
92
100
108
Ω
P
Push 6 mA into xP pins, force 1.3 V on xN pins; measure voltage
from xP to xN, calculate resistance (ΔV/ΔI)1
Input Voltage Differential
0.2
1.0
V
PF
Common-Mode Voltage
0.85
2.35
V
PF
Input Bias Current
−20.0
+2.2
+20.0
μA
P
Each pin tested at 2.85 V and 0.35 V, while the other high speed
pin remains open
Pin Output Characteristics
Output High Range, VH
−1.4
+6.0
V
D
Output Low Range, VL
−1.5
+5.9
V
D
Output Term Range, VT
−1.5
+6.0
V
D
Functional Amplitude (VH − VL)
0.0
7.5
V
D
Amplitude can be programmed to VH = VL, accuracy specs
apply when VH − VL ≥ 200 mV
DC Output Current Limit
Source
75
100
120
mA
P
Driver high, VH = 6.0 V, short DUTx pin to −2.0 V, measure current
DC Output Current Limit Sink
−120
−100
−75
mA
P
Driver low, VL = −1.5 V, short DUTx pin to 6.0 V, measure current
Output Resistance, ±50 mA
45.0
47.0
49.0
Ω
P
Source: driver high, VH = 3.0 V, IDUTx = 1 mA and 50 mA;
sink: driver low, VL = 0.0 V, IDUTx = −1 mA and −50 mA; ΔVDUT/ΔIDUT
ABSOLUTE ACCURACY
VH tests done with VL = −2.5 V and VT= −2.5 V;
VL tests done with VH = 7.5 V and VT = 7.5 V;
VT tests done with VL = −2.5 V and VH = +7.5 V; unless otherwise
specified
VH, VL, VT Uncalibrated Accuracy
−250
±75
+250
mV
P
Error measured at calibration points of 0 V and 5 V
VH, VL, VT Offset Tempco
±450
μV/°C
CT
Measured at calibration points
VH, VL, VT DNL
±1
mV
CT
After two-point gain/offset calibration
VH, VL, VT INL
−10
±2.5
+10
mV
P
After two-point gain/offset calibration; measured over driver
output ranges
VH, VL, VT Resolution
0.6
+1
mV
PF
After two-point gain/offset calibration; range/number of DAC
bits as measured at calibration points of 0 V and 5 V
DUTGND Voltage Accuracy
−7
±1.3
+7
mV
P
Over ±0.1 V range; measured at end points of VH, VL, and VT
functional range
VH, VL, VT Crosstalk
±2
mV
CT
VL = −1.5 V: VH = −1.4 V
→ 6.0 V, VT = −1.5 V → 6.0 V;
VH = 6.0 V: VL = −1.5 V
→ 5.9 V, VT = −1.5 V → 6.0 V;
VT = 1.5 V: VL = −1.5 V
→ 5.9 V, VH = −1.4 V → 6.0 V; dc crosstalk
on VL, VH, VT output level when other driver DACs are varied
Overall Voltage Accuracy
±10
mV
CT
Sum of INL, crosstalk, DUTGND, and tempco over ±5°C, after
gain/offset calibration
VH, VL, VT DC PSRR
±15
mV/V
CT
Measured at calibration points
AC SPECIFICATIONS
Rise/Fall Times
Toggle DATAxx
0.2 V Programmed Swing
1000
ps
CB
VH = 0.2 V, VL = 0.0 V, terminated; 20% to 80%
1.0 V Programmed Swing
800
ps
CB
VH = 1.0 V, VL = 0.0 V, terminated; 20% to 80%
2.0 V Programmed Swing
950
ps
CB
VH = 2.0 V, VL = 0.0 V, terminated; 20% to 80%
3.0 V Programmed Swing
1000
1175
1500
ps
P/CB
VH = 3.0 V, VL = 0.0 V, terminated; 20% to 80%
3.0 V Programmed Swing
1650
ps
CB
VH = 3.0 V, VL = 0.0 V, unterminated; 10% to 90%
5.0 V Programmed Swing
2350
ps
CB
VH = 5.0V, VL = 0.0 V, unterminated; 10% to 90%
Rise to Fall Matching
30
ps
CB
VH = 3.0 V, VL = 0.0 V, terminated; rise to fall within one channel



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