ADATE305 datasheet(35/56 Pages) AD

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ADATE305

Rev. 0 | Page 35 of 56

DEFINITION OF SPI WORD

The SPI can accept variable length words, depending on the

operation. At most, the word length equals 24 bits: 16 bits of

data, two channel selects, one R/W selector, and a 5-bit address.

Depending on the operation, the data can be smaller or, in the

case of a read operation, nonexistent.

Table 18. Channel Selection

Channel 1

Channel 0

Channel Selected

NOP (no channel selected, no register

changes)

Channel 0 selected

Channel 1 selected

Channel 0 and Channel 1 selected

Table 19. R/W Definition

R/W

Description

Current register specified by address shifts out of

SDOUT on next shift operation

Current data is written to the register specified by

address and channel select

Example 1: 16-Bit Write

Write 16 bits of data to a register or DAC; ignore unused MSBs. For example, Bit 15 and Bit 14 are ignored, and Bit 13 through Bit 0 are

applied to the 14-bit DAC.

DATA[15:0]

CH[1:0]

R/W

ADDR[4:0]

Figure 68. 16-Bit Write

Example 2: 14-Bit Write

Write 14 bits of data to the DAC.

DATA[13:0]

CH[1:0]

R/W

ADDR[4:0]

Figure 69. 14-Bit Write

Example 3a: 2-Bit Write

Write two bits of data to the 2-bit register.

DATA[1:0]

CH[1:0]

R/W

ADDR[4:0]

Figure 70. 2-Bit Write

Example 3b: 2-Bit Write

Write two bits of data to the 2-bit register. Bit 15 through Bit 2 are ignored and Bit 1 through Bit 0 are applied to the register.

DATA[15:0]

CH[1:0]

R/W

ADDR[4:0]

Figure 71. 2-Bit Write

Example 4: Read Request

Read request and follow with a second instruction (could be NOP) to clock out the data.

DATA[15:0]

CH[1:0]

R/W

ADDR[4:0]

CH[1:0]

R/W = 0

ADDR[4:0]

Figure 72. Read Request

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