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7721 bảng dữ liệu(PDF) 261 Page - Renesas Technology Corp |
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7721 bảng dữ liệu(HTML) 261 Page - Renesas Technology Corp |
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261 / 577 page ![]() 7721 Group User’s Manual 12–10 A-D CONVERTER 12.3 A-D conversion method The A-D converter compares the comparison voltage (Vref), which is internally generated according to the contents of the successive approximation register, with the analog input voltage (VIN), which is input from the analog input pin (ANi). By reflecting the comparison result on the successive approximation register, VIN is converted into a digital value. When a trigger is generated, the A-D converter performs the following processing: Determining bit 7 of the successive approximation register The A-D converter compares Vref with VIN. At this time, the contents of the successive approximation register is “100000002” (initial value). Bit 7 of the successive approximation register changes according to the comparison result as follows: When Vref < VIN, bit 7 = “1” When Vref > VIN, bit 7 = “0” Determining bit 6 of the successive approximation register After setting bit 6 of the successive approximation register to “1,” the A-D converter compares Vref with VIN. Bit 6 changes according to the comparison result as follows: When Vref < VIN, bit 6 = “1” When Vref > VIN, bit 6 = “0” Determining bits 5 to 0 of the successive approximation register Operations in are performed for bits 5 to 0. When bit 0 is determined, the contents (conversion result) of the successive approximation register is transferred to the A-D register i. The comparison voltage (Vref) is generated according to the latest contents of the successive approximation register. Table 12.3.1 lists the relationship between the successive approximation register’s contents and Vref. Table 12.3.2 lists changes of the successive approximation register and Vref during the A-D conversion. Figure 12.3.1 shows the ideal A-D conversion characteristics. Table 12.3.1 Relationship between successive approximation register’s contents and Vref 12.3 A-D conversion method VREFV 256 Successive approximation register’s contents: n 0 1 to 255 ! (n – 0.5) Vref (V) 0 VREFV: Reference voltage |
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